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Choosing Transformer Impedance 1

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chadwiseman

Electrical
Aug 20, 2003
32
My company is currently considering changing our standard impedance of new 1000 kVA (4160/600) transformers from 6% to 8% to keep our fault levels low. However there are concerns about voltage regulation as we have a lot of connected motor loads. Is there any appropriate documentation that might provide direction of how to strike a balance between the two (or personal experience)?

Thanks.
Chad
 
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Presonally, I think it's a design to design decision. One instance that comes to mind is Arc-flash. With a lower impedance, your overcurrent protective devices are more likely to trip instantaneously on an arcing fault because of more fault current available. Conversely, higher impedance means less fault current, and your overcurrent protective device may clear the arcing fault, but now it may only clear it in the long time band. That's why short circuit and coordination studies are so important.

Mike
 
mparent has good point.

Firstly, at 1000kVA, at 600V barely has 16000A fault current with 6% Z and 12000A with 8%Z. Equipment and breakers rated 18kA or above are not premium items at all, so what exactly your are saving/gaining? PLus you will end up with a special tranformer which may be expensive and in the future may have to be replaced by a similar unit if fails.

I am not sure how much voltage regulation is dependent on short circuit impedance, but some tranformer designer or mfr may answer that.

 
The reason why I am considering higher impedance is that we are in the intial stages of doing an arc flash study, and reduced fault current may be favorable for this situation. As well, for maintenance purposes there are times when multiple transformers must be paralled, doubling the fault current.

Thanks for you input.

Chad
 
I'm no arc-flash expert, but a recent thread thread238-128390 indicates that lower available fault current is more hazardous from an arc-flash standpoint.
 
Lower available fault current produces a more hazardous situation only to the extent that it causes the clearing time to increase by more than the available energy decreases. If a lower fault current results in 50% less incident energy and a 5% longer clearing time, the arc hazard will be reduced. There comes a point though, that a 5% reduction in incident energy will come with a 50% (500% for that matter) increase in clearing time; that is a significant increase in hazard. It all goes together.
 
86Ranger,

Again,..be very careful about limiting the amount of fault current. Personally from the studies I've done, lower fault current levels can be a problem with molded case devices, and because of the limited ability to adjust them (magnetic only for example), you may not be able to get a sufficient clearing time to limit damage. Then with static switch devices, you can often have problems with downstream coordination, because the short time setting must be adjusted substantially lower than you might otherwise, to allow clearing on an arcing fault. If you're paralleling transformers, you just have to size the system based on that case, ie closed transition switching. Typically, that's not a big deal, since you may allow multiple OEM's to bid on the equipment, giving you a fair price.

Mike
 
My experience in doing arc-flash studies leads me to agree with mpparent - I would not want to restrict fault current too much in low voltage systems. Most of the high arc energy situations occur because fault current is too low, not too high. This is because the fault current is not high enough to get into the instantaneous (or short-time) trip function of the upstream circuit breaker, or to get the fuse into its current-limiting mode.

For a 1000 kVA transformer, I would definitely stick with the nominal ANSI impedance.
 
Even if you keep the available current high, that does not mean you have that current for every fault. Fault impedance may limit the current too. Don't the arc flash studies consider this? Better use PPE that's appropriate for the highest current down to the lowest pickup on your curve. Or maybe choose a low current point on the curve where it's possible to simply walk away when you start to feel too warm. Do the studies consider this as well?
 
stevenal,

Arc Fault studies are based on the 3 phase bolted fault condition. There is no consideration for fault impedance. Also, it's my understanding that the equations developed by IEEE are based off of empirical data. That's why they throw in the 80% fudge factor. What I mean by this is, according to the standard, you calculate the arcing fault current based off of the equations. Then you find the trip time. Then you take 80% of the arcing current just calculated, and calculate its trip time. Whichever value has the LONGEST trip time, you use this value to calculate the incident energy, as it will have a higher value.

Mike
 
Since energy is related to (I^2)t, I would not simply use the longest time. Current has a greater effect than time. I can see the problem, however, when going from instantaneous to TOC or current limiting to not, as DPC said. And if this transition should occur at 79% or lower I guess it's ignored.
 
stevenal,

All I can tell you is the IEEE 1584 standard uses time, based off of trip curves for devices, and then using the arcing fault value (calculated from the available 3 phase fault), you get an incident energy. The longer the trip time, the more incident energy. The energy equation is directly proportional to time and is proportional to the log of the arcing current. More often than not, the 80% of the arcing current initial, calculated value always has a longer trip time, and thus more energy available.

Mike
 
Any attempt to calculate arc-flash energy is necessarily an approximation at best. The intent of IEEE-1584 is to provide a method of calculating an approximate arc-flash energy for a given set of conditions.

Because of the unpredictable nature of arcs, as shown by actual test data, IEEE-1584 first calculates an expected arcing current based on the 3-phase bolted fault current (and other factors). This current is used to determine the protective device clearing time as well as the arc-flash energy. To allow for variability, IEEE-1584 then requires a second energy calculation be done at 85% of the calculated arcing fault current - but only for systems below 1000V. The worst case arc ENERGY is then used. This is supposed to capture something like 95% of the arc energy levels taken from the test data.

It's certainly not perfect, and it will be changing as more testing is done, but that's the best guidance we have at this time. BTW, above 15 kV, the IEEE-1584 equations are purely theoretical and not based on actual test data at this point.

So, getting back to OP issue, I would still opt for standard impedance 480V transformer based on my experience doing arc-flash calcs.

 
dpc,

Thanks. I stand corrected. It's not 80%, it's 85% as stated by you.

Mike
 
Hi, does anyone know what the CSA standard is for 1000 kVA 4160/600 V transformer impedance?

Thanks for all the replys.
 
I would guess it's 5.75% nominal. Try a google search.

Mike
 
mpparent,

I checked the standard. The first equation relates the log of the normalized incident energy to the log of the fault current. Second equation relates incident energy to the normalized energy along with clearing time and distance. Looks more like a direct relationship than the square that I claimed and the log relationship you claimed. A quick test with flux.exe showed doubling either the current or the time roughly doubled the incident energy.
 
stevenal,

I stand by my post. The incident energy equation is directly related to time, and the normalized energy (within the incident energy equation) is a log function related to the arcing current.

Mike
 
lg En = K1 + K2 + 1.081 lg Ia + 0.0011 G (4)
where
En is incident energy (J/cm2) normalized for time and distance 13
K1 is –0.792 for open configurations (no enclosure) and
is –0.555 for box configurations (enclosed equipment)
K2 is 0 for ungrounded and high-resistance grounded systems and
is –0.113 for grounded systems
G is the gap between conductors (mm) (see Table 4)
 
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