gmarocco
Electrical
- Jan 24, 2017
- 1
Hy, I am designing a power distribution board using the OR-ring topology The board has to carry about 34A per contact
( and 140A in the common nets. I am designing the board using 4 layers. In order to route the power nets I have used a copper pour area equal for all the 4 layers. I plan to use 70um copper for both external and internal layers.
I have checked Saturn PCB design but I am not sure regarding the option "Plane present".
Has this option to be checked when the signal is routed using a copper pour area or when the signal is routed
using a track sorrounded by a ground plane? For example using a 70um thickness for both internal and external layers (with 20°C of temperature rise) I obtain with the option "Plane Present" that a width of 16mm will handle 52A for external layers and 31A for internal layers
A second question: is it correct to assume that the total current capacity is the sum of the of the current capacity of external layers plus the sum of the current capacity of internal layers? For example using the above results is it correct to assume that the total current capacity is roughly 160A?
Thanks in advance
( and 140A in the common nets. I am designing the board using 4 layers. In order to route the power nets I have used a copper pour area equal for all the 4 layers. I plan to use 70um copper for both external and internal layers.
I have checked Saturn PCB design but I am not sure regarding the option "Plane present".
Has this option to be checked when the signal is routed using a copper pour area or when the signal is routed
using a track sorrounded by a ground plane? For example using a 70um thickness for both internal and external layers (with 20°C of temperature rise) I obtain with the option "Plane Present" that a width of 16mm will handle 52A for external layers and 31A for internal layers
A second question: is it correct to assume that the total current capacity is the sum of the of the current capacity of external layers plus the sum of the current capacity of internal layers? For example using the above results is it correct to assume that the total current capacity is roughly 160A?
Thanks in advance