Explanation of DC offset during inrush

[wfowfo]

This sounds like a "power" subject, but bear with me here.
Since all our inrush is airconditioning load, I figured this site would be better than the power one.

At our electric utility, we are looking at some new line sectionalizers that utilize electronic circuitry to differentiate between fault current and inrush. The manufacturer says it can do this because inrush has a DC offset and no zero-crossing like fault current would. I researched an earlier post on this site that seems to confirm this, but it didn't go into specifics.

I was under the impression that fault currents also had DC offsets.

Can anyone explain this phenomenon in laymans terms? And how are the two different? (Or is the salesman pulling my chain?)

 

[electricpete]

Whenever you suddenly apply or increase voltage to an inductive load, there is a dc offset component which suddenly appears and then decays away with an L/R constant.

v = L * di/dt
i = 1/L * integral v(t)dt where i(0) is assumed 0

If you begin integration of a sin(theta) at theta=Pi/2, 3*Pi/2, 5*Pi/2 etc, you get a simple sinusoid coming out.

But if you begin integration at theta=0, Pi, 2*Pi etc, you get a dc offset.

So the dc offset is dependent upon phase angle which is somewhat random depending upon time of the transient compared to the voltage cycle.

The dc component pushes transformers into saturation during inrush due to transformer saturation, which creates high harmonic content of the "magnetizing inrush current". This harmonic current is used in transformer differential to differentiate between an actual fault within the zone (which has very little harmonic current) and magnetizing inrush (which has high harmonic current). That is called a harmonic restraint of the differential relay.

This doesn't sound like exactly the application you're talking about. But it's the application I'm familiar with.

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[wfowfo]

I appreciate the response, but perhaps my "laymens' terms" was a tad optimistic.
Could you dumb it down a bit?

 

[davidbeach]

DC offset is due to attempted instantaneous changes in current through an inductor or voltage across a capacitor. Quite frankly, I would expect more offset in a fault than in an inrush, but in either case, the amount of offset on a given phase is function of closing angle, and closing angle is entirely random.

So, can you distinguish inrush from a fault of the same magnitude simply by looking at DC offset? Not likely, and if you could, you would find that faults are likely to have a greater offset (for a given closing angle) than load inrushes. Fault and inrush currents are both limited by the equivalent impedance from the infinite bus to the fault or load, including the fault or load impedance. A fault is likely to have a lower impedance, therefore higher currents, than an inrush. The inrush is likely to have a lower X/R than a fault, and the lower the X/R, the lower the offset for a given closing angle.

 

[rbulsara]

Both davidbeach and electripete are right. I am no expert at component designs, but based on what is in the linked document below, I gather modern relays differentiate inrush and fault currents by measuring the amount of harmonics (of certain power, 2nd, 5th , 7th etc.). Normally low levels of harmonics indicate a fault, high levels of harmonic indicate a inrush.

Please remember that this document discusses transformer differential protection, similar to what electricpete indicated. But I assume the principle is the same.

Here is the link:

http://pm.geindustrial.com/FAQ/Documents/T35/GER-3989A.pdf

Look up page 11, item 3.1.

 

[electricpete]

There is dc offset in a transformer present during both through-fault and energization/inrush, but associated with different parts of the equivalent circuit creating different results

The dc offset current present during through fault is associated with the series elements (leakage reactance) and does not cause transformer saturation and therefore does not cause harmonics in the transformer current.

The dc offset during transformer energization/inrush is associated with the magnetizing/parallel branch. It causes saturation and results in harmonics present in the magnetizing inrush current.

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[electricpete]

wfowfo - sorry I didn't see your request for laymen's terms. I can't think of anyway to describe dc offset in layman's terms. I have been trying to think of an analogous example from everyday life but I can't think of any.

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[raisinbran]

wfowfo,
In a purely inductive circuit, the current lags behind the voltage by 90 degrees - when the voltage sine wave is at its peak, the current sine wave is crossing thru zero. If the fault (or inrush) occurs when the voltage sinewave is at its peak, the current starts at zero, and everything is good. If the fault (or inrush) occurs when the voltage sine wave is crossing zero,the current cannot increase and remain in phase with the voltage - it must lag by 90 degrees. This is what causes the dc offset. This offset decays bases on the X/R rato of the circuit, and then the current and voltage are in their proper steady-state relationship. Fault or inrush - I think that this same explanation would apply.
Hope that this helps.
Raisinbran

 

[wfowfo]

This is starting to make sense in a "....trust the Force, Luke Skywalker" kind of way.

Let me see if I can explain the original concern. Suppose a recloser is looking down a distribution line. A smaller, moderately loaded line breaks off of it that is protected by this sectionalizer.
A permanent fault occurs at the end of the original line and the recloser starts going through its sequence to lockout. Each time it recloses, the sectionalizer will theoretically see an inrush and count. By the time the recloser has locked out, the sectionalizer will have also reached its "full count" and fallen open. Then it will appear there is a fault down the tap as well as the main line and cost maintenance time patrolling the tap.

The manufacturer says it will not count the inrush because, quote, "The circuitry must detect a zero crossing during the event to count. Since inrush is uni-directional until it decays, the device will not count it. A fault is alternating and will count".

Have I understood his explanation correctly as a DC offset, or have I confused it with another phenomenon?

 

[dpc]

Well, since you're dealing a salesperson, they may have access to branches of physics not understandable by normal engineers.

But I think he/she may have been talking about something else. This sounds similar to the "adaptive" fault detectors sold by Joslyn that are supposed to be able to distinguish between motor starting inrush or cold load pickup current and fault current. Basically, they look for rapid increase in current followed by decrease to zero. If it doesn't go to zero, it is assumed to be inrush/load related. I don't think this has anything to do with dc offset.

http://www.joslynhivoltage.com/catAdaptiveTrip1547.htm

Both inrush current and fault current may have dc offset. Dc offset on motor starting can be signicant, causing tripping of instantanenous trip molded case breakers.

 

[stevenal]

As previously stated, the decaying exponential is determined by X/R. This term is fairly constant for a fault, but is decreasing as a motor starts up. Perhaps your control is filtering out the fundamental, and examining the shape of the decaying exponential. Don't see how zero crossing could possibly enter in to it.

How about a make and model of this device?

 

[wfowfo]

It is a Chance Electronic Sectionalizer (CES). This is the type that fits into a conventional fuse cutout.

 

[stevenal]

No microprocessors here. Like any sectionalizer it counts operations of the upstream recloser so the two items together can distinguish permanent faults on the protected lateral from transient faults on the protected lateral and from permanent or transient faults not on the protected lateral.

http://www.hubbellpowersystems.com/powertest/catalog_sections/PDF_ccspp/10D-Elec_Sect.pdf