Gated Integrator Switch 1

[keystoneclimber]

Hello all,

I designed a gated integrator circuit. The first version worked well. I used an analog MUX for the gate (reset) switch. I figured the same thing could be done for less cost and using less board real estate by replacing the MUX with a MOSFET. When using the MOSFET, the integrator output no longer ramps smoothly from zero, but shows an initial "jump" in voltage before ramping smoothly.

The two circuits schematics are here:

http://users.adelphia.net/~keystoneclimber/imagehost/integrator_comparison.pdf

The scope screen captures are here:

http://users.adelphia.net/~keystoneclimber/imagehost/scope_capture.pdf

Any thoughts? Thanks in advance!

Brandon

 

[Comcokid]

Appears you may have some "charge injection". This is a classic issue in design of analog mux and switches. IC multiplexers and switches are designed to minimize charge injection issues. Basically, the gate of the MOSFET is a capacitor, and your quick digital edge couples into your integrator capacitor via the gate. Your use of a power MOSFET makes this worse as power MOSFETS while designed for low Rds ON, are not designed for low gate capacitance.

Try a analog SPST/SPDT switch instead. There are lots of them available - in SOT 23-5 packages and smaller. Google "charge injection" - I know analog devices has some information on this in some of their design guides or application notes.

 

[Skogsgurra]

Your gate/drain capacitance draws a charge packet from the opamp input and that charge is seen as a step in the output.

Use a transistor (or switch) with minimum G-D capacitance, reduce gate control voltage, ramp (smooth) gate control voltage, change topology. Lots of things to do. But main thing is not to inject or subtract charge from opamp input.

Gunnar Englund

http://www.gke.org

--------------------------------------
100 % recycled posting: Electrons, ideas, finger-tips have been used over and over again...

 

[logbook]

Brandon,
Well done on the quality of data presented in your question. It would be great if other users could be so thorough.

Hopefully you are satisfied with the answers from Comcokid and Skogs, both of whom are spot on in their answers.

 

[logbook]

Q= C*V

dQ= C*dV

You have a 200mV spike on a 10nF capacitor which equates to a charge injection of 2nC. A Maxim Max4902 gives 125pC which is better, but you can get smaller FETs (higher on resistance) which are even better. The MAX4749 quotes 7pC!

 

[keystoneclimber]

I never really payed much attention to the Qgd value and now it's come back to bite me! It turns out that Vishay has some parts with a low Qgd with slight Rds(on) and Id trade offs. Neither should matter in this application. I may also try one of the small package analog switches just for reference. Thanks to everyone for their insights.

Brandon

 

[jimkirk]

What the others said...

The 4052 has an N channel MOSFET in parallel with a P channel device. They are small geometry, so all the capacitances are small, and since one is turned on with a high going signal and the other is turned on with a low going signal, the charges injected tend to cancel.

You can get single switch devices, though the cost might not be any lower than a quad switch due to quantities. Check NXP (Philips) 74HC1G66, or a quad like 74HC4016. They'll probably be easier to interface to than a single MOSFET.

 

[dskurnik]

All the above comments are correct - your problem is caused by charge injection because you used a power FET with a huge gate capacitance. This is a tough problem to solve well with a pcb design because very few manufacturers of analog switches focus on gate charge - what sells today is low Rds On. You can try some of the low Qinj parts suggested above. There is also a class of LDMOS Fets with very low gate charge - the old SST211 series that I think is now sold by Calmos. You can also look at using a high voltage JFET (the higher the breakdown voltage, the lower the Qinj), although it is harder to use because it is a depletion device.

In the end, once you find the best part that works for you, consider changing to a fully differential integrator design so the charge injection is balanced and rejected. Since the input signal is single ended, just tie off the unused input through a resistor to GND. The charge will still be rejected.

It looks like you used Orcad to draw your schematic. PSPICE should be able to give you a pretty good estimate of how well the new design will work.

 

[itsmoked]

Don't know what your application is but you could try a few other things.

Change R22 or something "just" small enough to turn on the FET. Perhaps even 100k depending on your gate voltage and what's driving the gate.

Alternatively you could raise R22 a little ~10k and put a cap shunted across R23. This would knock hell out of the dvdt reducing the injection.

BTW: I agree with logbook's assessment of your original question. Well done!

Keith Cress
Flamin Systems, Inc.-

http://www.flaminsystems.com