Ground Fault trip on transformer inrush 1

[alex444]

Hiya all,

I experienced a ground fault trip when energizing a 1500 kVA transformer during a system startup and would like some input/comments from you all.

The electrical distribution system is a 4160V, 3 phase, 4-wire, solidly grounded system. The feeder breaker load is a 1500 kVA delta-wye transformer.

The breaker protective relay is a Cutler-Hammer Digitrip 3000 with the following ground fault settings:

CT pri: 200
LTPU: .1x
Curve: FLAT
Multiplier: .2s

The transformer load consisted of both 3 and single phase loads connected to it and that would start on energizing.

On energizing the transformer it tripped out on GF. I raised to the next setting which was .25s. It still tripped. Raised the setting to .3s and it held.

When it tripped out on GF, the trip unit recorded 40-50 amps. On the .3s settings, it read 0 amps.

My question is: Why did I have nuisance trips?

I looked in the IEEE Buff book but it skims overs nuisance tripping in the section for Ground Fault Protection.

If it tripped due to load imbalance, inrush, or CT mismatching due to tolerances, it should have held at .25s since there was more than enough time (cycle wise) for the transformer to settle.

Any help/comments are welcome.

 

[peterb]

Couple of further questions on your setup-
- Is the relay connected to the residual wye circuit of the phase CTs? Or perhaps to a separate core balance CT?
- What is the accuracy rating of the CT? How about wiring length/size between relay & CT?

My experience suggests uneven CT saturation under inrush conditions as the possible cause. Various corrective measures are available, such a installing a stabilizing resistor in the CT circuit or installing a separate core balance CT to feed the ground element of the relay (if this is available on the relay). The presence of load, 3-phase or single phase, on the transfomer should not affect the situation.

 

[electricpete]

IEEE242-1986 (Buff Book) page 290 says about core balance (window) transformers: "Care is necessary to prevent false tripping from unbalanced inrush currents that may saturate the transformer core."

Personally it makes more sense to me that saturation would be a factor for ct connected at residual wye point as peterb calls it. Here high magnitude current in each phase causes phase error which causes non-zero sum. But on window ct... if the primary current truly sum to zero then I would think that saturation would be a non-factor because window ct also sees zero. Maybe someone can explain why the buff book thinks this is a concern for window transformer schemes.

Inrush current on unloaded generator stepup transformers may be more than 10 seconds. DC component decays with the huge L/R time constant using approx Lmagnetizing (very large) over approx R winding (very small) with some additional contributions from the supply impedance. I'm sure that distribution transformers act differently and load also affects the decay.

 

[electricpete]

Buff book page 292/294 lists several factors that "limit the sensitivity of ground-fault sensing". I infer that any of these items can cause a trip if not set high enough to compensate:

- Residually-connected relays: primary rating and accuracy of the largest current transformer used; how well matched are the current transfomrers; what is burden. [This was the factor discussed above.]

- Location of conductors within core balance transformers.

- Circuit charging current drawn by surge arrestors, shielded cables, and motor windings. [In this case capacitance to ground created high actual ground current during high dv/dt associated with energization].

 

[dpc]

This type of nuisance tripping is not really unusual, unfortunately. Although IEEE suggests 0.1 seconds for transformer inrush currents, I have seen oscillography of much longer inrush periods, up to 1 or 2 seconds.

The zero sequence type CT is subject to error due to conductor placement leading to unequal flux cancellation. The transformer inrush currents are always unequal and this can make the situation worse. The residual type ground relaying is subject to CT saturation, and othe effects mentioned previously. The zero sequence CT is better, but still can have problems.

Also, I'd suggest talking with Cutler-Hammer to see if there have been any similar problems with the relay. They may have some suggestions for dealing with the problem.

 

[electricpete]

dpc - I believe what you say (it sounds familiar)... but I'm having a hard time understanding why the phase currents can be unequal during transformer inrush. The delta winding on transformer high side provides an open circuit for zero sequence. Stated another way: I can't draw any path for phase current flow which does not return through one of the other phases (although certainly non-sinusoidal during inrush... I would think that instantaneous currents still sum to zero at all times). Am I way off base? Can anyone explain/comment?

 

[alex444]

... hmmmm ... forgot to mention the relay is wired for residual ... one of those minor details ...

also, the CT's are bus mounted inside the medium voltage metalclad switchgear ....

.. as for CT accuracy ... they are 10C20

I appreciate you alls input but ...

I can see transformer inrush currents lasting 1 to 2 seconds, but the inrush decay down to 25% should be in a couple of cycles (I realize this is a function of load)..... by the time you reach 2 sec., the inrush has already dampened significantly.

I guess where I am getting hung up on is the fact that I had to raise the time setting to .3s which is about 19 cycles, before the GF would NOT trip. I can understand there being a CT mismatch due to CT accuracy during inrush (although I do not believe it to be my situation in this case) and the mismatch causing a false reading .... but not for 15 cycles.

Another possiblilty would be CT saturation, but again, I do not believe this is the case since CT saturation normally occurs around the 20x figure .. and transformer inrush is around 10x.


Thanks for the comments

 

[dpc]

Alex,

What is the pickup setting for the ground fault protection? Is is possible to increase this a little?

For electricpete: The transformer inrush is a function of, among other things, the phase angle of the voltage wave when the contacts on the breaker or switch close. Since each phase is 120 deg from the other, one phase generally produces a much higher current than the other two. That is why a particular relay will sometimes trip and sometimes not. The inrush can vary greatly each time it is energized. Even for a delta winding, the currents in each phase can be unequal. They just have to sum (vector) to zero at each node. This does not require any zero sequence current to flow. Consider a single line-to-ground fault on the secondary of this transformer - no zero sequence in the primary, but the three phase currents in the primary will be very unequal.

Also, keep in mind that the inrush current is incredibly non-linear and full of harmonic currents. This can also confuse the relay.

I would suggest increasing the pickup setting of the ground element. If you don't find any other problems and this solves the tripping problem, I wouldn't worry about it too much. It's not uncommon.

 

[electricpete]

Alex - I don't have any good answers for you. But I would not be quick to discard saturation based simply on the magnitude of current being far below 20x 5A at rated burden.

thread237-9886 shows an example of waveform distortion where secondary current is only perhaps 40 amps PEAK (25A rms?) on a 200:5 amp ct. By the way this test was repeated on a different motor with different ct's and identical results... this is normal ct behavior.

How is it possible that waveform is distorted at only perhaps 5x rated current? Well, you are not guaranteed flawless replication of the waveform up to 20x, only that the rms value of the waveform will not deviate by 10% or whatever at 20x with rated burden. You'll see that the distortion on this particular waveform (and all ac or dc plus ac waveforms) is at the zero-crossing point and therefore will influence the rms urrent neglibibly... remembering that Irms=Sqrt(1/N*Sum(Ik^2)) where N is number of samples and k is time summation index. The rms formulation weights heavily the Ik with high values and weights lower the Ik with small values. For example if I have two samples which are supposed to read 100A and 10A I get actual rms=sqrt(1/2*(100^2+10^2))=71.06. But if CT saturation makes the lower one go to zero (similar to what you'll see with any dc offset as in my example), and compute rms of 100A and 0A, I get rms=sqrt(1/2*(100^2+10^2))=70.7A for a difference of 0.4A .... very small change approx 1/2%.

But if I input this to a residual circuit with another CT (let's assume it is reading faithfully), then at the moment when the 10 goes to zero I see a difference of 10A.

Also as you have mentioned it is the DC that contributes very heavily to saturation even more than most people think. We know that 100% dc offset [Ioffset=1+sin(t) vs Inormal=sin(t)] can double the peak value during first half-cycle. But if you look at area under the current-vs-time curve (which is the quantity of interest in determining saturation) you'll see it is in fact Pi (3.14) times as much as the non-offset waveform. You can get this by comparing non-offset waveform area int(sin(t),t=0..pi)=2 to the offset waveform area int(1+sin(t),t=-pi/2..3*pi/2)=2*pi.

You are correct of course that saturation should disappear as the dc offset disappears. From simple analysis of the equivalent circuit I would conclude that lower loading gives a slower decay time. I'm interested to hear more thoughts on this one.

Does your relay by chance have event recording?