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Load contributions to faults

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flickstar

Electrical
Oct 10, 2001
16
Ladies and Gents,

I have recently been using a power distribution system simulation package and have noticed some weird occurrences in fault simulations. I am hoping someone may be able to shed some light on reasons for the results I am seeing.

I am finding that my fault currents vary depending on downstream load. Some of my observations are:

Induction motor loads contribute to the fault current - I know that this does actually happen in practice, however have always thought that such currents are in the order of the motor starting current and this is not what I am seeing in my simulations.

Static loads (of constant impedance) increase fault current at the source - I have no explanation for this.

Capacitor loads actually decrease fault current at the source - I would have thought that capacitors would feed into a fault.

I figured I could get some consistent results by disconnecting all load, but I still get higher than expected results. Using the source impedance my trusty calculator gave me a result for FL = 1/xs. However the simulation package, with only the source in service, gives me a result about 4% higher.

As someone who is regularly given results from this package to use for calculating protection settings, I am worried about an overestimation of fault currents. How can I guarantee my settings are sufficient in detecting a fault when I don't have much room to play with between load current and fault current?

If anyone can provide any insight into why I am seeing the above results, or point out any error I have made, it would be greatly appreciated.

Cheers!
 
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The software manual includes validation report. May be, you can find answer in that.

Aside, what comes to my mind is
- did you consider tolerance over the impedance when you did the hand calculation.
- did you do the connectivity check on the model developed (and ensure there are no spurious / unwanted / unseen connections). I used to have this problem in EDSA.
Trust the above helps.
 
rraghunath thank you for your reply.

I am confident my models have been correct. I have conducted load flow analyses that give expected results, and the programme has its own check for unusual occurrences in the model. I have also tested several different models and keep getting the same results.

What do you mean by 'tolerance over the impedance'? Do you mean I should reduce the impedance by some margin before my hand calculations?

I have spoken with other people in my company and have been told that this programme has always given 'higher' than expected results, and load has always impacted on fault current. As a young Engineer who likes to ask a lot of questions I see little value in accepting that if something has always been one way then it must be the right way.

rraghunath, from your response it seems that you are suggesting the results I am getting are incorrect and the only reason for them could be some error in the models or programme. Am I correct in making this assumption?

The software package we are using was developed in the US and I am in Australia. Perhaps it is possible that some assumptions or default settings in the programme do not apply to our distribution system.

Cheers.
 
Induction (and synchronous) motors will certainly contribute to fault current, in the range of 4 to 5 times their rated kVA.

Other linear loads such as lighting, heating, etc should have little impact, although if the program links power flow to its short circuit calcs, the load will impact the pre-fault voltage. Most programs don't work this way, however.

Capacitors can contribute to fault current, but are generally ignored because the current tends to be cancelled out by the lagging inductive current from motors and other sources. Capacitor response under fault conditions is complicated.

As already suggested, IEEE and others have sample systems that can be used to validate your results. I would consult with software provider as a first step. As far as I know, the laws of physics in Australia are pretty similar to those in the US, so your results should be consistent.

 
What model is the package using to calculate the fault level? IEC909, the traditional "1pu volts on all nodes pre-fault, all shunts ignored" (which is what you did for the hand calc, presumably), G74, etc. These all treat shunt loads, motors etc differently, and are fussy about the source models (generators ain't quite the same as voltage behind impedance models).

Knowing what the "right " answer isn't always (or should I say ever) easy. Generally, the traditional mehod tends to give higher currents (more conservative for relay grading).

Check the help files to see how your software does it, and if it isn't right for your situation, set it up so it is. Also consult AS3851, the Australain Std (it may have been updated to be in line with IEC since I last checked).


Bung
Life is non-linear...
 
Thanks for your responses guys.

The software package is PSS/ADEPT.
 
"Capacitor loads actually decrease fault current at the source - I would have thought that capacitors would feed into a fault."

That seems to make sense. If a capacitor feeds current into the fault, it increase voltage drop accross the fault impedance and means less fault current drawn from the source.

"Static loads (of constant impedance) increase fault current at the source - I have no explanation for this."

Have you examined the problem with symmetrical components.
I'm a little rusty but I look in my book and see an example SLG fault where loads clearly provide parallel paths in some of the sequence networks which decrease the effective impedance and therefore increase the fault current. If you describe your scenario (slg? source ground impedance, load grounding configuration etc), I'm sure some of the guru's here can walk you through it.


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Hi

I use SKM Powertools which models fault currents based on IEC 60909, this takes into account the fault current contribution from motors, generators and also REC's network.

As a rule of thumb, the motor fault contribution is approximately the same as motor LRC (Sk" = S/X"d PU) however voltage correction factors are also applied by the codes (which code are you working to ?).

Also the fault current contribution from the motors decays rapidly (one or two supply cycles). Clearly the rating you need for the switchboard / MCC withstand is Ik".

If you have MCC's fed from transformers then these will significantly limit the motor contribution to the overall fault current on the primary side of the feeder.

Using fuses also helps as these will limit the I2t let through and the peak current - the following Bussman site has some useful technical and is well worth a look.


As far as contributions from pfc capacitor banks, I guess that the stored charge must contribute to the fault current however I have modelled with and without PFC's and the differences appear to be negligible.


_______________________________________
Regards -

Colin J Flatters
Consulting Engineer & Project Manager
 
After asymmetry of the fault has decayed, inductance and capacitance should neither contribute nor reduce fault current.

Just a theory - Loads may affect the X/R ratio of the system. If the loads are inductive, the X/R ratio might increase, which would increase the asymmetrical fault duty. If the system is predominatly inductive, capacitors would reduce thevinin reacance, reducing the asymmetrical fault.
 
Just a few points to consider -
1) Fault levels will vary with voltage so 1/Xs will produce a low result (assumed 1.0 pu voltage) Most standards require at least 1.05 pu.
2) Fault levels can increase with load due to the machines being on higher loadings and therefore having higher excitation and higher Volts behind their reactances.
3) Many software packages calculate fault currents 'in reverse' (by applying a voltage at the point of fault within the algorithm). For these programs all passive loads and shunts must be removed as they should not be included in this.
Hope thats some use..
 
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