PCBA low leakage current 2

[zappedagain]

I have a high impedance PCBA design with 140V signals and I want to ensure the leakage current between traces are under 1.4 uA (100 Megohm, 10^8 ohms), mainly for crosstalk and drift. Can anyone suggest a good process for achieving this?

My PCB assembly manufacturer is currently using a water soluble flux and checking their washing process with IPC TM 650 2.3.25D ROSE Testing (Resistivity of Solvent Extract). They have another facility check their cleanliness, and per that test report it appears they consider 2 Megohm (1.56 ug/cm2 sodium chloride equivalent) acceptable and don't check past 10 Megohm (0.31 ug/cm2). That makes sense because their tester has a 60.3 Megohm maximum value. This test report shows 0.00 ug/cm2 so I'm a bit suspicious of that result.

Side question for an IPC TM 650 2.3.25 expert - the tests results are defined in units of 'ug/cm2 of sodium chloride' and in Ohms; is that really Ohm/square?

My PCB assembly manufacturer has suggested going with an Ion Chromatography analysis. I'm not familiar with that test yet so that's why I'm asking. I'm working with test house(s) to see what is recommended.

My initial research shows there are no-clean fluxes that claim SIR (Surface Insulation Resistance per IPC or Telecordia spec) well above 100 Megohm (10^11 looks typical). Would the proper no-clean flux be a better approach?

In the past I've worked on a picoamp leakage design (no solder mask, alcohol wash) so I know the leakage can get orders of magnitude less than a microamp. This design was very low volume though so we never verified the process, only the final products. Is there a middle ground for microamp leakage?

I appreciate your experience. Thanks,

Z

 

[IRstuff]

What's the environment of the board? How do you intend to keep smog and dust from the traces after delivery?

Have you considered a parylene overcoat?

TTFN (ta ta for now)
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[zappedagain]

This board will be used in indoor industrial environments and will be inside an IP67 rated enclosure so dust is not a problem. This board currently has soldermask over the traces. I hadn't considered smog; is it worse than 90% relative humidity at 65C (probably if it is smoggy under those conditions)? A quick search shows some theoretical things published on the conductivity of smog; are there any good references available?

Parylene looks interesting. I still need to make sure I have a clean PCBA before an overcoat is applied; at least Parylene will keep out the moisture effects. Coatings may get tricky because I have opto-mechanical parts on this PCBA, and the high voltage signals pass through a cable from another PCBA (but I digress...).

Z

 

[VEBill]

As you'll know, surface resistance is "ohms per square". But that doesn't work for volume measurements.

Googling just now found this:

http://four-point-probes.com/understanding-volume-resistivity-measurements/

I expect that you already know all this, and your question was very specific to "IPC TM 650 2.3.25".

--

I've seen some interesting PCB design approaches inside ionization smoke detectors, where they seem to be comparing gigaohms. Quite a bit of router work to leave air gaps in the critical locations.

Military work often uses Humiseal coating to lock the traces away from the environment.

 

[itsmoked]

If your design takes more than a board house's normal everyday cleaning you're in trouble. Fix the design. Do NOT try to get other companies to be responsible for 'special' cleanliness.

Receive the assembled boards, test them, conformally coat them with a polyurethane coating like Humiseal and ship them. Otherwise, your product will fail sporadically and what will seem like randomly until after years of torment you recognize that you still have a problem because 'environment X' still get to them.

Fix the board so that no matter how dirty it is it will work then follow the above advice. You fix it by using space where you need to, guard traces, and routed slots.

Keith Cress
kcress -

http://www.flaminsystems.com

 

[zappedagain]

I talked with the test facility and they confirmed that their setup for IPC TM 650 2.3.25D considers 2 Megohm (1.56 ug/cm2 sodium chloride equivalent) acceptable and don't check past 10 Megohm (0.31 ug/cm2). I'm guessing that is the lowest cost and easiest test to run for a company to claim a clean process.

The test facility recommended using the IPC TM 650 2.6.3.7 Surface Insulation Resistance (SIR) test to check for higher impedance. This is a standard test for no-clean flux processes, so if my board house can pass this test with their normal everyday (water soluble) cleaning then we are all set. If not, then things need to change...

Z

 

[MacGyverS2000]

If your design is low-quantity (say, <1,000 units), and ultra-clean is a requirement that no house tests for, why can't you clean them in-house? You can pay close attention to the QA aspect of it, and you know in the end it will meet your specs.

Dan - Owner

http://www.Hi-TecDesigns.com

 

[zappedagain]

Unfortunately the PCBAs are going to another vendor (who should also be checking the cleanliness) where they add a few hundred dollars of value to the board (that rumor has it can't survive the soldering/cleaning process, that's why it is a secondary process). I then get to check the final assembly for cleanliness when I receive that assembly, but by then its expensively late to be rejecting PCBAs.

I'm only looking for microamps of leakage, not picoamps, so this doesn't seem like 'ultra-clean' rocket science; this still is within the realm of IPC Class II. This is a single source part so these are the vendors I'm stuck with.

Did I mention my management loves to outsource as much processing (i.e. cleaning) and assembly as possible...

For the record, I talked with the test facility and the IPC TM-650 Ion Chromatography test can identify exactly what residue is left on an assembly, but it has worse resolution than the Ionic Cleanliness test for determining how much residue is left on a board. So I expect you can run an Ion Chromatography test first to determine what residue you have, and then run an Ionic Cleanliness to determine how much residue you have.

Z

 

[MacGyverS2000]

Unless it's a dirt-cheap, single-sided-with-jumpers PCB, pretty much everyone does Class II these days. If your requirements truly meet Class II levels for cleanliness, the board house should be able to meet it.

Some day I'll write up my story of how we found out our preferred board house was lying to us about their capabilities...

Dan - Owner

http://www.Hi-TecDesigns.com

 

[sunnysky]

No-clean flux is terrible with humidity and I would expect much more ionic than the residue of aqua clean flux.

It is very ionic and in worst cases, I have experienced several laptops, some from Apple with the failures due to corrosion from no-clean flux residue. I realize this is orders of magnitude more harsh environment but then so were the results.

I would expect issues from 100MOhm surface creepage from any airborne dust unless this is built in a class 100 clean room.

My advice is design the layout with active guarding around the critical high impedance signals and use a suitable PCB mask. ( dry or wet )

 

[zappedagain]

Thanks for the info. It appears there are some very good no clean fluxes that can keep the SIR well above 100Meg (100,000Meg), but there are many no clean fluxes that can't.

For now management says we'll continue with our current process and test as we go. Here we go...

Z

 

[sunnysky]

I wonder if SIR is measured dry or at 100% RH? That makes a huge difference with the Er of 80 in moisture and ionic flow by orders of magnitude. ( just checked Produce 40 ± 1 °C at 90 ± 3% R.H. above dew point!)

The dew point is the problem I found with all laptop products that I had fail. (Mac Air, Asus Ferrari, etc) They literally rusted in days with exposed copper. and blue dew point tags to invalidate the warranty....