Phase lock loop/ Loop Filter/Low pass filter/Pi controller 1

[bgtj67]

Hello to All

I have a question concerning the phase lock loop,

I could not understand the Loop filter:


in Wikipedia :

https://en.wikipedia.org/wiki/Phase-locked_loop#Linearized_phase_domain_model

the where two types of Filter:

1. one-pole RC circuit
2.the lag-lead filter with one pole and one zero.


i have also read , that the Filter can be realized with a Pi-Controller.
But the Transferfuntion of a Pi Controller is not equal with the two type of filters above,
and is a Pi Controller also an Low pass filter?
So how to use a Pi controller as the loop Filter?

Thx

 

[xnuke]

In the discussion below, when frequency is mentioned, it refers to the complex frequency s = σ + jω, not the frequency of the PLL.

Technically, the low-pass filter is the controller in a negative feedback loop. This controller shapes the frequency response magnitude of the closed loop such that it has high gain at low frequencies to reject low frequency disturbances (and track changing setpoints, if that is desired) and has low gain at high frequencies to reject high frequency noise. Often, any filter that has a high gain at low frequency and low gain at high frequency will change the loop shape in this fashion. All of the filters you mentioned can do that (provided that what you call lag-lead - but most call a lag controller - has the pole at a much lower frequency than the zero).

Plot the Bode magnitude plots for each - they aren't that different. The single pole active RC filter has a flat low-frequency response at a non-infinite positive dB magnitude, then after the pole is reached, its magnitude drops 20 dB/decade as frequency increases and it goes to negative infinite gain at infinite frequency. The lag controller has a flat low-frequency response at a non-infinite magnitude, then after the pole is reached, its magnitude drops 20 dB/decade as frequency increases until the zero is reached, at which point the frequency response levels off instead of going to negative infinite gain at infinite frequency. A PI controller has infinite gain at low frequency due to the pole at the origin of the s-plane. It's magnitude drops 20 dB/decade as frequency increases until the zero is reached, at which point the frequency response levels off. The PI controller is nothing more than a lag controller whose low-frequency pole has moved to the origin of the s-plane.

xnuke
"Live and act within the limit of your knowledge and keep expanding it to the limit of your life." Ayn Rand, Atlas Shrugged.
Please see FAQ731-376 for tips on how to make the best use of Eng-Tips.

 

[benta]

You need to differentiate between PLLs.
Lock at zero frequency difference (Type I)?
Lock at zero phase difference (Type II)?
Lock at zero phase change (Type III)?

Type I and Type II are predominant, the most popular being Type II, second order response PLLs. This kind of PLL requires an integrator in the Loop Controller (my preferred term for "loop filter", as it's not just an LP filter, but controls the dynamics of the complete loop).

The Wiki article contains a lot of waffle. I strongly suggest you start with Floyd M. Gardener, "Phaselock Techniques". It has all the basics (but is costly).