Programable Unijunction Tranistor 1

[Lakey]

Hi,

I’m using a PUT [2N6068] to trigger a Thyristor or SCR [C106D1] as follows:-

Circuit A:

+Veo-+-------------+------------------+
| | |
/ / |
R1 \ R2 \ |
/ / |
\ \ |
| | |
| +---+ |
+-------+ | | |
| A | .G | |
| |__/ | |
| PUT _\_/_ | ------ SCR
| |K | _\_/__
| +--------|-----------___/ |
| | | |
| / / |
C1 ---- R3 \ \ R4 |
____ / / |
| \ \ |
| | / |
0V o---+-------+-------+----------------+----o

Once PUT ‘A’ > ‘G’ the SCR is triggered via ‘K’. The circuit acts as an OFF delay before operate. So far so good.

Circuit B:

I want to build a sister circuit, using the PUT & SCR as an ON delay before OFF. I.e. as soon as +V is applied the SCR is ON, but is switched OFF once the PUT is triggered ‘in reverse’. Unfortunately, I have been unsuccessful in making this work. I’m sure I’ve missed something simple and would appreciate any thoughts.

Regards,

 

[VEBill]

If I recall correctly, SCRs can be triggered on with a pulse to the gate, but can only be switched off by removing the power. In other words, they can't be triggered off via their gate input.

In AC circuits this characteristic is less of an issue since the AC goes "off" 120 (or 100) times per second.

I've only considered the SCR - no comment on the PUT circuit.

 

[Lakey]

I don't have a problem with the SCR.

I want the O/P of the PUT to remain high until it is switched off via the RC network. The inverse of circuit 'A'

Thanks.

 

[VEBill]

"I don't have a problem with the SCR."

Unless you plan to use a relay (or something) to invert the output of your circuit, you do have a major roadblock in your plans to build a "sister circuit" using the same components (specifically the SCR).

Basically, if the SCR is on, how exactly do you plan to turn it off? (Hint: you need to cycle the DC power.) If you plan to operate the SCR normally (and invert the output later), then your PUT circuit doesn't need to be changed (leave it alone).

The typical UJT (PUT) circuit is - in principle - very similar to the 555 timer chip. To answer your specific question, I've never seen one that has an inverted output (not that it matters in this case).

 

[Lakey]

Thank you Ve1bll.

Yes you are correct - there is more to this circuit than the above. My intention was to keep things as simple as possible.

Therefore my question is - is it possible to keep the O/P of the PUT (K) high until it has been tiggered by a increasing voltage at A or G?

My understanding of the device is that triggering occurs when 'A' > 'G'. I initially thought swapping A & G around would achieve my desired results but, alas, it wasn't to be.

Regards

 

[VEBill]

Perhaps you can take the output (from the PUT circuit) from the bottom of R2. The voltage at this point will be 'high' (pulled 'high' by R2) until the PUT is triggered and then the voltage will drop - pulled 'low' by the PUT through R3.

Note - the voltages ('high' and 'low') will be set by the ratios of R2, R3, R4, and the PUT. There will be limits to the range of high and low imposed by other characteristics.

You have to determine for yourself (through calculation and/or experimentation) if the signal at this point is useful.

 

[Lakey]

Darn, i missed that possibility. Thanks & regards.