Single point grounding of CT's

[bacon4life]

thread238-174486 discussed single point grounding.

Our standard is to ground the CT's at the first panel they enter. In our distribution substations, the high side CT's would be grounded at the first terminal block in the A1 panel and the low side CT's are grounded in the AUX panel. Both of these are then connected to microprocessor based differential relays.

With microprocessor based relays, is each set of CT's isolated from the other sets? If so, what is the rationale for requiring that the neutrals of the CT's be connected together, with a single jumper to ground? In electromechanical relays I see how a ground loop would form with a ground on each set, but I can't figure out what the failure mode would be for digital relays.

The SEL 387 manual figure 2.8 shows a single point ground, and the paragraph above calls special attention to using a single point safety ground.

However, the SEL 487B manual states "Because each of the 18 current channels is independent, be sure to apply a ground to each set of three CTs forming the current input from each terminal."

The SEL 587 manual APPENDIX F shows several configurations with a single ground symbol, but I did not see where it calls any attention to the need not to apply a ground to each set.

As mentioned in the referenced thread, IEEE C57.13.3 shows single point grounding. However, the standard does not appear to address microprocessor based relays. It also makes me a bit hesitant that it is 24 years old. Granted, that is a year younger than me.

 

[apowerengr]

bacon - I think your question is more related to applications involving the 487B or other relays where current inputs can be reprogrammed and thus associated with different circuits/zones whereas most other microprocessor based relays are constructed with the assumption that adjacent CT inputs are grouped three phases to a circuit. You need to check the internal schematics to ensure that the current circuits are isolated (I can't say I've seen one which isn't other than internally summed phase currents for a ground/imbalance application). Relays like the 487B can set off unplanned application errors because we're all so accustomed to CT groupings and conditioned to use the assumptions which follow.

 

[stevenal]

C57.13.3-2005 does indeed refer (once anyway) to microprocessor relays, and is only 3 years old. Single point grounding is still advocated.