spread spectrum oscillator clocking a DAC 3

[geekEE]

If a spread spectrum oscillator is used to clock a DAC or an ADC, I assume that there will be some distortion or noise introduced due to the intentional clock jitter. Is there a way of predicting the amount of additional distortion or noise if you know the spectrum bandwidth of the oscillator?

Thanks in advance,
Glenn

 

[MacGyverS2000]

If you know the "pattern" of the oscillator, you can calculate the noise caused in the DAC (though my ability to do so without cracking open a lot of text books has long since passed). Consider a single frequency being measured to get your head around it... for example, if it is spread across the frequency range as a Gaussian function due to the spread spectrum clocking, the noise will be, too.

Dan - Owner

http://www.Hi-TecDesigns.com

 

[zappedagain]

Are you familiar with using a phasor diagram for SNR analysis? I expect if you translate your frequency variation into time (phase) variation you will get a reasonable noise estimate. This technique is often use for phase-shift-keying (PSK) modulation.

John D

 

[VEBill]

Some (most?) of the jitter may disappear in the clock dividers, if there's enough of them (for example: a 50 MHz system clock driving an audio I/O subsystem sampling at 48 kHz). The residual modulus of the low frequency clock's jitter might be relatively insignificant (being a fraction of a ns on a kHz clock).

But if the ADC/DAC is running at similar very high frequencies, them none of this would apply.

 

[zappedagain]

Quadrature Amplitude Modulation (QAM) might give you better leads than PSK once you start searching for this.

 

[geekEE]

Hmmm, if you guys were here with me, you'd see me giving you a blank stare. Looks like I need to do a lot of reading to look up the terms that have been thrown out here.

VE1BLL's point is interesting. I was originally thinking that any divided down versions of the clock would have a similar spread spectrum range, but in thinking about it, it seems like every division of the clock will change the frequency distribution to be closer to the center. Is that right?

Glenn

 

[MacGyverS2000]

Correct. Consider this... every time you go through a clock divider, your clock's deviation from the "center" frequency will decrease. Eventually (theoretically?), the deviation would drop to zero as you pass through enough dividers and you get to 1.

Dan - Owner

http://www.Hi-TecDesigns.com

 

[geekEE]

FYI. I just found an article that has some formulas that are close to what I need.

Jitter and the ins and outs of SNR

http://www.edn.com/article/CA6715765.html?nid=2551

Glenn