Vias under chips 3

[MacGyverS2000]

After reading all of the hoopla on the net, one would think vias under a chip are a definite no no, the reason generally cited being solder is wicked up the via and can possibly prevent the chip from seating properly. However, it's obviously done by board houses big and small (look at any motherboard for proof), so I'd like to know what they do to allow it.

I'm willing to bet blind/buried vias aren't an issue since there's no route for the solder from one side of the board to the other. That leaves us with straight through vias, but again, the net hoopla suggests that via tenting to prevent solder flow-through is a thing of the past...yet they make no suggestions as to what technique has replaced it.

Can anyone with experience in this area make some suggestions, if not the answer itself, where I might find the answer?

 

[Skogsgurra]

Interesting question, McGyver. But that is something that I, as a circuit designer, never worries about. That is for the production people. I think that you will find more answers in a forum that is more production or process orientated.

 

[logbook]

Solder only wicks up through the via if you are doing wave-soldering. A lot of boards are just infra-red re-flowed and don’t have a problem.

If there are wire-ended parts then I believe selective soldering can be done using sort of solder pot type of system. In any case the amount of solder wicking up through the via is going to be pretty small when using the fine vias (micro-vias) used on modern boards. I have never considered it as a problem.

Blind vias are scrupulously avoided due to excessive cost.

 

[felixc]

Upon request PC fabs can do what is called "via plugs". It is a second pass of solder mask, a thicker one, made specifically for that purpose. You can choose to have it applied on one or both sides of the board. You can generate the via plugs from your CAD software, or just ask the pc fab to generate the gerbers themselves from yours, as their CAM software will allow for doing this much faster that you could. Just tell them which hole size needs a via plug.
Via plugs are also helpful for operations that require vacuuming a pc board into position on a jig, like lead trimming or in-circuit testing.
You can relax, it is cheap and easy!
Felix

 

[MacGyverS2000]

Thanks Felix!

Now, does anyone have a rough breakdown of costs as options are added? For example, I normally have double-sided boards made, but this next project is definitely going to be a 4-layer. logbook, you mentioned that blind/buried vias are avoided due to cost...I don't doubt it, but I wonder where the cost comes from...having to drill each layer separately before pressing them together, or is it the tight tolerances needed for registration?

I can get a rough feel for how much a 4-layer will increase my cost by looking at how much my prototype costs increase...I would imagine about a 30-35% price increase, sound about right? Vias are always going to be there, but having them as through-hole kind of defeats the purpose of moving to 4-layer, so blind/buried is the next logical step. Any idea what kind of percentage cost increase I can expect to see with blind/buried vias? I imagine the cost of via plugging will be 5%, or less, but no hard data to back it up.

 

[cbarn24050]

Hi, the main problem with vias under chips is not being able to wash the board under the chip. Any residues left behind can lead to corrosion.

 

[felixc]

Are you mounting SMT parts densely on both sides? these are the only things to justify going to buried vias, because there's no ther choice. I made 10 layers with SMTs on both sides plus thru-holes, with impedence control, and no buried vias! When density rises, there's no magic recipe for success and low-cost.

cbarn, the washing machines are able to push water or solvent (depending on the type of flux) under PLCCs. If you are still concened there are no-clean fluxes.

For the pricing issues, the best is to talk with a local pc fab. It all depends on your volume requiments, and what the fab is used to manufacture.

 

[MacGyverS2000]

Yep, both sides. Everyone's definition of dense is slightly different, but I consider my designs fairly high on the scale.

As an example, imagine a portion of a board I'm currently laying out. This portion is about 3" long and 1-1.5" wide. It includes four 0.100" pitch through-hole connectors, three 4x2 and one 5x2 (side by side, they cover the entire length). Now add to that 32 SOT-23 packages, 32 0603 resistors, and a couple of 100mil traces on the outer layer for about 2A of power. Plenty of other components on the rest of the board, and I'll shrink/grow the board size, as necessary.

It's very time consuming and tedious, but I somehow enjoy the work...seems like a break from having to deal with vendors

 

[melone]

It has always been my understanding that through hole vias are drilled AFTER the layers have been pressed together. Therfore, blind and buried vias add extra steps in the board manufacturing process. As far as a price delta for B&B, it has been my experience that it will increase it between 10 and 25%. However, I am working on 8 layer PCB's, double sided, 0.5mil pitch boards. Try cramming 450 pins in a 17mm x 17mm BGA package and route signals out. Even with 3 mil traces, it is IMPOSSIBLE unless you fan out with vias under the BGA device!

If you really want to get crazy, go to HDI (High Density Interconnect). You will be amazed with how much stuff you can get routed when you have 3 mil traces. Plus, you get to use special HDI vias (very small). However, going to HDI layers will also increase PCB cost by 10-25%.

 

[MacGyverS2000]

After some thought, I realized I wouldn't be saving much space by going with B/B vias (a few percent, maybe?). After moving a few things around, it looks as though through-hole vias will be more than adequate for the project. Yes, I'll spend a bit more time routing certain tracks around the vias, but it will have significant savings in the long run.

Not to mention I can get my prototypes on the cheap if there are no B/B vias ($200 for 4-layer @ 150in^2...should fit about 9 boards/panel with my current size).


melone, Out of curiosity, do you keep track of all 8 layers mentally, or do you give an autorouter pretty free reign? For density purposes, I've always laid my boards out by hand, and 4 layers is about all I'd really like my poor mind to grasp at once. Do you try to get everything to fit on 4, then only move to the extra layers when absolutely necessary, do you split trace density evenly between layers, etc.?

 

[melone]

- You get used to the extra layers, especially when you are talking about thousands of connections. Also, having a good layout tool is essential. You need to be able to turn on and off layers quickly. Flipping between layers while routing is needed to "see" what going on around your trace.

- Careful placement and layer assignment is CRUCIAL in routing something that dense. If the physical location / orientation of devices is poor, you will never be able to route it (even if you throw extra layers at the problem).

- The way I have always approached routing is: 1) Power & Ground, 2) Clocks, 3) Time or impedance sensitive signals, 4) Critical signals, 5) everything else. Try to keep everything short and sweet. Minimize layer transistions. Add multiple vias on high power lines (to reduce the impedance, resistive & inductive). Be meticulous with your autorouter rules (if you insist on using one)!!!!

- Autoroute in sections! Then fix what the autorouter has done. This will save you hours of work later.

Sorry for the rant, but I have been bitten by these things too often, and would hate for anyone else to struggle with these same problems!

Good luck and keep us posted!