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Current Transformer Saturation Curves 6

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CarltonJohnCarr

Electrical
Apr 13, 2001
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I have a question about the saturation of current transformers. I am a controls tech by trade and I was trying to make a comparison of the magnetic characteristics of saturable reactors to CTs. When the core of a saturable reactor is saturated, the permability of the core decreases (reluctance increases). This causes inductance of the core to decrease (L= uN2A/l). When inductance decreases, inductive reactance decreases (Xl=2pi fl), and for a given applied voltage, current will increase. This seems to be just the opposite of what happens to a CT when it saturates. Is there something different about the core material of the CT or am I just way off base with this whole thought process.

Thanks for your help.
 
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Depends on which way you are looking at the situation.

The equivalent circuit of a CT consists of the following -
- Ideal transformer with appropriate turns ratio
- Variable inductance connected across the secondary of the ideal CT
- CT secondary resistance connected in series with the secondary lead

The excitation current of the CT varies with the secondary voltage - you check the excitation (or magnetizing) curve by applying a variable voltage to the secondary terminals with the primary open circuited. The resulting curve shows that as you increase the applied voltage, the excitation current increases more or less linearly up to the kneepoint voltage, at which point the CT iron saturates and the excitation current increases at a higher rate.

The saturation mechanism is the same as for the reactor, but realise that the current which increases in this case is the excitation current in the equivalent circuit inductance. This current is supplied by the ideal CT on load and is subtracted from the secondary current, so the current available at the CT terminals is less than expected.
 
Good answer peterb.

For the benefit of CJC, I'll reemphasize your last point, which is that the excitation current increases when the CT goes into saturation. That excitation current is not really an external measurable current that you can directly measure. It is an internal current within the CT. If we ignore turns ratio and express all quantities on the secondary side of current transformer, then I1=I2+Im (vector sum). As Im increases, then I2 decreases further below I1. Im represents the non-ideal behavior of the current transformer.
 
Thanks, electricpete. Just to further clarify a point -

When the CT is carrying primary current (load or fault), the operating voltage on the secondary is determined by the secondary current flowing through the internal CT resistance and the external burden in series. This is the voltage which determines the excitation current drawn and hence the current error.
 
I'm with you on this, Electricpete. Definitely check the excitation curve of the CTs to verify that they are up to the job.
In the course of the excitation curve check, drive the CT well into saturation by increasing the exciting voltage to the point where the CT current increases to the rated value (5A), then decrease the voltage slowly to zero. This process will demagnetise the CT.
 
I can't imagine that saturation would cause tripping of a 50/51. In general saturation will make the secondary current read falsely low. This can be a problem on differential or imbalance (or 46), but not overcurrent. But testing is good.
 
electicpete,
You were using relay numbers above: i.e. 46 is imbalance, 50 is overload, etc.. Are these IEEE numbers or ANSI or someone else? What relevant standard classifys relays this way? Is it available for no charge? I have seen these used before but not by everyone. Is this a fairly new nomenclature or has it been around a while? Thank you
 
buzzp - Power System Device Function Numbers, IEEE Std. C37.2. These numbers have been around since before I was born. This standard is not free, but if you sniff around you can probably find a free listing and brief description of the most common device numbers. Some you might be interested in:

27 - undervoltage relay
32 - directional power relay
37 - undercurrent or underpower relay
38 - bearing protective device
46 - reverse-phase or phase-balance current relay
47 - phase-sequence or phase-balance voltage relay
49 - machine or transformer thermal relay
50 - instantaneous overcurrent relay
51 - ac time overcurrent relay
52 - ac circuit breaker
59 - overvoltage relay
67 - ac directional overcurrent relay
86 - lockout relay
87 - differential protective relay

Suffixes can be used, ie. 50G for ground instantaneous overcurrent, 87T for transformer differential relay, 51V for voltage-controlled time overcurrent relay, etc.
 
Is the use of these numbers increasing or decreasing? I worked for a motor controls manufacturer that has been around for 30 years or so and they never used these numbers and didn't even know what they were, exactly. I will check GE's site too, thanks.
 
It is interesting to see IEEE numbers for various equipments. We see Europeans use different way of designating the equipments. For example, we fing that all circuit breaker manufacturers use Y for closing and Tripping coils. For example Y1, Y2, Y3 etc. Can some one tell me from where the European practice is derived?
 
CT saturation has become a very heated discussion in the last week or so in my work environment and it mainly revolves about the DC offset component.

We are in the process of replacing a 11kV board (metal clad switch gear) and new CTs are to be ordered as well. The main concern is the effect of saturation for the bus bar protection (bus zone protection) The fault level is 34.5kA and the proposed CT knee point voltage is 300V with secondary resistance of 6 ohm. CT time constant is given to us as 3 seconds (???). X/R of the prmary plant is adjudged to be between 6 an 11. I know this impacts heavily on the CT performance but an exact value could not be determined as yet. Not even from the transfomer manufacturer.

The main concern with saturation is that if you have a through fault condition, time must be allowed for the feeder protection to operate and clear the fault.

During this time the CT should not saturate so severely as to cause bus zone opertion and a complete loss of the board.

I have some references from a GEC application to determine the suitabilty but I would like to set-up a spreadsheet to graphically demonstrate the saturation. I would like to present the currents and flux involved. The result I got using the GEC notes presents a voltage curve that looks to me more like a flux curve.
V=(1.414*I*R2*N1/N2)*{w*T1*T2*[(exp(-t/T2)-exp(-t/T1)]-sin(wt)}/(T2-T1)where :
I = rms fault current
R2 = CT secondary resistance + any burden
N1 = number of primary windings
N2 = number of scondary windings
w = 2*pi*f
T1 = primary time constant
T2 = secondary time constant

Does anybody have some good references to aid me in my quest?
 

Stan Zocholl has publihsed some material on CT application.

selinc.com/techpprs/6142.pdf selinc.com/techpprs/6027.pdf selinc.com/techpprs/6107.pdf selinc.com/techpprs/6059.pdf selinc.com/techpprs/6038.pdf

 
Pentatek -
What type of busbar protection are you specifying? I would expect it to be a high impedance protection scheme, which has well developed criteria for CT selection.
You would select the scheme setting voltage based on the assumption that one set of CTs has in fact saturated - the setting voltage is calculated as the maximum secondary fault current multiplied by the loop resistance from the relay to the saturated CT (6 Ohms in your case?). The CT kneepoint voltage is specified to be at least twice the setting voltage, to ensure that you will have adequate operating voltage for in-zone faults.
Depending on the type of relay used and the setting voltage, you may or may not require an non-linear resistor for secondary wiring overvoltage protection.
One point to remember is that, with a high impedance differential scheme, saturation is pretty well assured for an in-zone fault. Setting as described above ensures stability for through faults.
 
peterb

What your are describing is true for "steady state" fault currents. (or that is how I understand it) The focus here is for transient conditions when X/R ratios and point of wave switching causes high DC offsets.

I am interested to plot the flux pattern and associated secondary current/voltage, then calc the rms value and proof through fault stabilty with a specific setting as required by the power plant owner. The kind of relay,DC insensitve or not is very important I believe.

If time to saturation is very short (asume full saturation) and the decaying component of the current has not deminished substantially, will this not add to the "diff" current that might flow? I am just worried that this offsett voltage that will develop could be higher than the operating voltage of the high impedance bus zone protection setting. Am I concerned about nothing here or am I misundertanding how the current transfer would take place through the "healthy" CTs during the DC offset time?

Just to end this post. I have used the principal you decribed to calculate the stabilising resitor required for a ABB SPAJ115C relay. I would like to generalise the off-set issue to older relays as well.

Thanks for commenting on the issue. Highy appreciated.
 
Pentatek -
Recall that the high impedance scheme is ancient (somewhat like myself), tried and true.
The scheme is based on allowing for complete saturation of the offending CT - no output at all. In the practical case, there will always be some output, even if the level of saturation is severe.
This worst case scenario allows for the transient effects that you are concerned about, without going into the level of detail that you are seeking. I'm not familiar with the particular relay that you are using, but the principles remain valid.
 
Peterb

Thanks for your comments and I know the next question is not directly related to the topic. In closing then, the feeders generally has lower CT ratios than the bus zone, yet they are subjected to the same fault current. Is it also your believe and experience that it could lead to normal 50 and 51 devices taking longer than expected or in some cases failing to trip and the incomer to the board could trip on its back-up protection? Protection 50 min ops time on ABB SPA* devices are typically 40ms so you'd expect fault clearance in about 100ms. I have experience that it took upto 260ms before clearance. The protection and breaker was tested afterwards and primary contact sepration started at 58ms, which would indicate that fault clearance should have been faster. The rapturing capacity of the breaker is 40kA in this instance and the fault level was about 28kA. I could only think that the CT saturated for a time and once the DC flux component had decayed enough, secondary current transformation was high enough again to cause operation.

Awaitng your thoughts.
 
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