Harmonic Mitigation with Altivar 61 2

[Marke]

I am having issues mitigating the harmonics with two Altivar 61 installations.
Both installations have variable amounts of even harmonics (2nd 4th etc) as well as triplens in addition to the normal harmonics that I expect.
These are the first two Altivar 61s that I have been asked to look at and I am not sure if this is a characteristic of the design, or if it is a fault on both units.

Both are on separate supplies and the phase imbalance is very low, and background distortion is around 3%, typically 5th and 7th harmonics predominantly.


Mark Empson
Advanced Motor Control Ltd

 

[jraef]

Those drives I believe use a sub-cycle variable carrier frequency technique that was originally developed at PDL there in your neck of the woods before being absorbed into Schneider, PDL called it "Whisper Wave" technology. The beginning of each cycle started at a low CF, then the rate increased in the middle of the cycle, then tapered off again at the end. PDL came up with it to quiet the motor whining without sacrificing efficiency in the transistors, then Schneider adopted it supposedly to reduce standing waves (no idea if it works or not, might just be a marketing thing). I've often wondered what effect it would have on harmonics.

"Will work for (the memory of) salami"

 

[LiteYear]

Just to be clear, you're talking about line side harmonics right? Because the switching algorithm has little to do with the line side harmonics, at least not in a stable way. That's because the output side is fairly well isolated from the input side by the DC bus. Even if the load side draw was influencing the DC bus and therefore the load on the line side, it would be very unlikely to do so in any fashion that is in sync with the supply cycle. The load side switches as necessary to produce the desired waveform on the outside. Even if that desired output waveform is at the frequency of the supply, it's not necessarily at the same phase.

The far more dominant factor on the line side harmonics is the design of the drive front end. I believe those Altivars are simply passive diode bridges, so the harmonics produced ought to be typical 6-pulse harmonics - predominantly 5th and 7th. Indeed, Schnieder's own published data on typical current harmonics produced by the ATV61 and ATV71 series don't even list values for any harmonic below the 5th.

The presence of 2nd and 4th harmonics suggests unbalanced conduction on the positive half cycle compared to the negative half cycle. A faulty diode bridge is one possible cause, but it seems unlikely and there are many other potential reasons. Unfortunately I don't have any actual measurements to give you a guide.

 

[jraef]

My musings regarding that were based on whether or not the constantly varying CF might change the method of current draw off of the DC bus to be less steady and create added "gulping" effects through the diode bridge. But like I said, it was just a musing, not even anything approaching a theory.

"Will work for (the memory of) salami"

 

[Marke]

Hello Liteyear

The harmonics are on the line side and we have to get the THDi down to 8% to comply with the local regs.
The input rectifier stage is a half controlled bridge, SCRs in the plus leg and rectifiers in the minus leg. I believe that the half controlled bridge is only used to limit the charging current to the capacitors at switch On and when the drive is running, they should be acting as a non controlled three phase bridge rectifier.
If the SCRs are not in full conduction, then any phase modulation will cause multiple harmonics and that is what we are seeing.
I am not sure if this is a characteristic of the design, or an aberration in these two drives.
Jeff, I do not think that that the output waveform will affect the input harmonics, but if the output waveform is asymmetric, then the DC bus could move relative to neutral/ground and that may introduce phase modulation of the rectifiers perhaps.
I have not experienced this performance with other drives, so not sure if it is a design characteristic or a unit characteristic.

Mark Empson
Advanced Motor Control Ltd

 

[jraef]

Mark,
When PDL implemented it, you could go into programming and turn it off, or actually just set the CF to a steady rate. If that is available in the ATV 61, it would be a simple (and interesting) experiment to test it out to see if the line side harmonics change, since you obviously already have the harmonics metering in place.

"Will work for (the memory of) salami"

 

[LionelHutz]

By phase imbalance you are referring to the voltages, correct? What is the current imbalance? Did you scope the phase currents?

It's possible with a 3-SCR/3-diode front ends to lose the gate drive to one of the SCR's. The phase with the non-gating SCR would have no positive current and the other 2 phases each lose one of the 2 negative current "double humps". That would certainly explain your even harmonics.

The SCR/diode front is typically used to pre-charge the capacitors by keeping the SCR's off and using 3 smaller diodes and a series resistor to charge the capacitors to a certain voltage before gating the SCR's full-on.

 

[Marke]

Hi Lionel

The input currents are pretty balanced, so all elements of the bridge are working. I can not guarantee that the SCRs are in full conduction however, if there is a timing issue in their control, this could contribute 2nd harmonic etc.
I have no experience with these drives so do not know if this is a common characteristic or not, or if we have some form of site problem.

Jeff, will have a play, have tried vector control and the different V/Hz modes and no difference so far.

Mark Empson
Advanced Motor Control Ltd

 

[jraef]

Mark,
Now that I am back at my PC, a quick look at the ATV61 manual shows that (true to form for the French), "Carrier Frequency" is called "Switching Frequency" and is in [Menu 1.4 Motor Control] (drC-), parameter code SFr. But more importantly, the "Whisper Wave" concept is indeed there, but now is called "Noise Reduction" and is at parameter code "nrd", then whether or not it is defaulted as On or Off apparently depends on the size of the drive.

One interesting aspect of this is what is implied in this note from the manual:

CAUTION
On ATV61p075N4 to U40N4 drives, if the RFI filters are disconnected (operation on an IT system), the
switching frequency of the drive must not exceed 4 kHz.
Failure to follow this instruction can result in equipment damage.

Being that the RFI filters are connected to the line input of the drive, this implies that the setting of the carrier frequency might indeed affect what happens on the front end.

"Will work for (the memory of) salami"

 

[LiteYear]

The input rectifier stage is a half controlled bridge, SCRs in the plus leg and rectifiers in the minus leg. I believe that the half controlled bridge is only used to limit the charging current to the capacitors at switch On and when the drive is running, they should be acting as a non controlled three phase bridge rectifier.

Interesting. I wonder if even when the SCRs are full on, they have a different conduction profile to the diodes, perhaps exacerbated by heat. I would expect the issue to be fairly well known if that were the case, so I think your original question about similar experiences is valid! Have you tried asking suppliers or even Schneider?

Being that the RFI filters are connected to the line input of the drive, this implies that the setting of the carrier frequency might indeed affect what happens on the front end.

No, the RFI filters they are referring to are capacitances from ground to the DC bus. They are disabled in IT systems because they can form a ground path under fault conditions. Without the RFI filters, you want to keep the switching frequency relatively low otherwise the leakage current via parasitic capacitance into the wider ground network is significant.