Help with clock synchronization

[funkydude]

Hi.. i am new to this forum, and i dont know if this is the right place to put this question. I am doing an A/D (analog to digital converter)-D/A scheme, in which i have to transfer voice across a fiber optic wire.
My bit clock is 256Mhz, and sampling clock is 8Mhz,and the system clock is 2Mhz. I need to synchronize clocks at my reciever (D/A) with the clocks at the A/D.The problem is, my A/D internally compresses a 13 bit resolution to 8 bits, so i dont know if i can use a clock recovery circuit at the reciver. It encodes the signal by what's called the "A-law" encoding scheme, but the signal does return to zero.
I'd appreciate any suggestions.. i am not sure how i can synchronzie clocks either.

 

[VEBill]

The good old fashioned 'Stop Bit' might be appliable if you have sufficient control of the detailed design at this point. A Stop Bit is a signal bit that is perhaps 40% wider than the data bits. You put one after every data word.

 

[IRstuff]

Is this a real requirement or a perceived requirement?

Why does the DAC clock need to be synchronized to the A/D clock? For voice, a several bit latency at 256MHz would be irrelevant

TTFN