High Impedance Bus Zone Protection understanding 1

[Pepwa33]

Hi there,

I feel that I have a good grasp of the high impedance bus zone concept, however I am battling to understand one part of this.

Why do we assume the worst case is for an external fault where the CT closest to the fault saturates?

I understand why this CT saturates, as it will see the full summated secondary fault current. I can also appreciate that this secondary fault current will flow through the magnetising branch which acts as a short circuit instead of the CT windings. I also understand that the setting Voltage of the relay should be set above the voltage induced across this saturated branch (= N x Rleads + Rct x K).

What I don’t understand is if we consider the same CT summating all the fault current but WITHOUT saturation, then won’t there be the exact same current through the leads and CT resistance inducing the same voltage as the saturated CT scenario? Why do we consider the worst case for when the ‘CT is saturated’?

What am I missing? Is there some sort of back emf that opposes the voltage across the branch when the CT is unsaturated?

Edit: typo

 

[Parchie]

You have the answers in your post!

A CT saturates when the induced flux in its core is too much, considering the fixed core area. You are required to consider a scenario where any change in the primary current values cannot be accurately reproduced at the CT's secondary winding, hence you don't want to operate above that area. That's the simplest explanation.

 

[Pepwa33]

Yes, I agree. However won’t the exact same summated fault current flow through this CT ‘branch’ for an external fault whether this particular CT is saturated or not, and therefore have a voltage induced across it? I can’t see the difference between these two cases..

I feel I am close to the “ahh huh” moment but I am missing something, probably obvious.

Edit: spelling

 

[DM61850]

When a CT saturates, the primary windings and secondary windings become decoupled and act as inductors with self inductance. The impedance that your relay measures the voltage off of for tripping is very large in comparison to the self inductance of the secondary winding of a CT. The current from the other CTs will path through the low impedance inductor rather than the high impedance resistor in the relay.

High impedance relaying can't saturate for in zone faults. For out of zone faults, any CTs saturating will prevent a large voltage from developing on the relay resistor and it will help safe guard the relay from tripping for out of zone faults. You might want to use high impedance relaying if you have a zone that has connections that can provide fault current and you don't want to have to size the CTs to not saturate for out of zone faults which you do for low impedance differential. If you have an in-zone fault, all the paths only see their own contribution. If you have an out of zone path, all the other paths contribute fault current through that path and that can require a larger CT if you don't want any saturation.
ct
Re-reading your post, it is looking like someone is applying the criteria for verifying that your CTs are sized correctly for low impedance differential, which can't tolerate any saturation. High impedance differential doesn't care about saturation for out of zone faults.

 

[stevenal]

If the CT does not saturate it will accurately reproduce the fault current in the reverse (away from bus) direction. Try drawing a simple two terminal bus, source on one side, fault (or load) on the other. Current will simply circulate between the two CTs, never raising voltage at the relay.

 

[111R]

See attached example. If both CTs are accurately representing the fault current and have similar specs and secondary wiring, there will be no current flowing through the high impedance element and no voltage across it. Since both CTs are producing the same output at opposite polarities and have similar lead wiring, the voltage drop is the same in both branches and the CT summation points connected to the relay element have 0V across them.

If one CT saturates, it no longer produces output for the majority of the time. Current from the unsaturated CT source splits between the saturated CT + cable and the high impedance element. The majority will flow through the much lower impedance of the saturated CT, but a small percentage still flows through the high impedance element.

For an internal fault, the CTs will still saturate since they're trying to drive a 2000 Ohm burden, but they're all producing the same polarity of output. So, for the short time period in each half cycle prior to saturation, they will produce an output pulse for just long enough to trip the relay assuming they aren't extremely undersized.

 

[stevenal]

111R,

You have the same node at three different voltages in the 1st example, and two in the second. I was really suggesting that Pepwa33 draw it out as aid to understanding. It doesn't work as well when someone else does it.

 

[111R]

Yes, I agree that it appears that way. I should've added symbols to represent the secondary resistance causing this voltage drop.

 

[Pepwa33]

Hi 111R,

That picture is really helpful. Are you able To add the secondary resistances causing the volt drop?

I have drawn it out but I’m still missing something. I’m so close to the “ah-ha” moment.