Lock-In amplifier or other alternative?

[demedeirosa]

I'm trying to determine the best way to extract a signal from noise. The signal of interest will be an FSK signal somewhere between 20-40kHz with a bandwidth of 2-5kHz. The amplitude of the signal will vary greatly, ranging from 1Vpp (DC Biased) to very low level signals of less than 1mVpp.

Doing some research has led me to the lock in amplifier, but I am not familiar with it, and from information ive found it appears that my signal of interest and the lock-in oscillator must be derived from the same source for phase relationships,which i'll never be able to do. Am I correct in my assumption?

I'm assuming that this is a fairly common problem in RF engineering, but I have no formal training or experience in RF to lead me anywhere useful.

 

[VEBill]

FSK is the traditional modulation scheme for Radio Teletype (RTTY).

Is the "carrier" frequency randomly drifting between 20 and 40 kHz, or do you need to tune into a certain frequency within the range?

The amplitude can be stabilized by means of an automatic gain control, provided that the noise isn't too high. It's typical practice to balance gain and filter distribution through the signal chain to stay within practical limits at each step.

These days it would all be digitized and demodulated within a DSP approach.

 

[IRstuff]

FSK, by definition implies lack of phase coherence, which is required for most lock-in amplifiers.

Does your FSK carry an embedded clock signal?

TTFN
faq731-376

 

[demedeirosa]

VE1BLL, I believe that the exact modulation scheme I am using is BFSK, I will have a space frequency of XkHz, and a mark frequency 2-3kHz higher than the space.

I attempted to use SPI controlled PGA's, but I will need to develop a more robust method as I am not detecting low level signals.

IRStuff, as of now my signal is basically a frequency modulated UART data stream at a particular baud rate. This would be the only embedded timing I believe, if its even considered timing.

 

[benta]

This is the job of a phase-locked-loop (PLL).
Some references in this thread:

http://www.eng-tips.com/viewthread.cfm?qid=321350

Benta.