Well I thought I did a decent job with my board layout/routing until the FCC test report came back *FAILED*. At least it was nice of them to put it in all capitals, made me feel better 
After reviewing the emissions report, it appeared a majority of the emissions were at every harmonic (even & odd) of the 75Mhz bus, in both vertical and horizontal planes (antenna polarity). These harmonics exceeded the allowed field strength of about 23db.
System specs:
*150Mhz processor with a 75Mhz address/data bus located on what we call a processor board with memory and other cpu-related peripherals.
*6 layer board in this order from top to bottom: (1)component/trace, (2)split power plane, (3)trace, (4)trace, (5)ground plane, (6)component/trace
*processor board plugs into a backplane board which could be conceptualized as a "motherboard." this board provides power and the circuitry for driving high current outputs. It also has 5 additional connectors (68pin) for expansion cards. The address bus and data bus are run to these connectors along with power, and some other misc i/o.
*all signals entering/leaving the processor board use bidirectional buffers located on the processor board.
*NO signals have any kind of termination on either board. The scope shows no reflections and aprox a 1V overshoot on a randomly sampled data line on the processor board.
*clock line is 75Mhz sine wave and is routed to all peripherals on the processor board, through the buffers, and to all expansion connectors on the backplane board, again, no termination.
Maybe I shouldn't have expected it to pass?:
As a saving grace (maybe), the enclosure is not shielded and neither are the cables entering/leaving as of the FCC test. Now I have added a spray on conductive paint exactly for shielding plastic enclosures and I have changed the cables to include a sheild (foil or braid over foil) with the drains tied to ground through a pin on the connector (not the best but I cannot switch to metal housing connectors as they're not available)
I'm now at the point where I'm going to build the next revision of the board. I was told to add a filter to every i/o line possible entering or leaving the box. I have chosen a ferrite and capacitor in a two-pole style low pass filter which will actually end up being a T filter when im done as seen here ...
Questions:
1. what is the best possible way to route the clock line to significantly lower my RF emissions from it.
2. Is my method for adding the T filter to every i/o before the external enclosure connectors sufficient?
3. Do I need to terminate any/all of my bus lines? Why or why not?
Any other suggestions?
And of course, thanks for taking your time to help me.
After reviewing the emissions report, it appeared a majority of the emissions were at every harmonic (even & odd) of the 75Mhz bus, in both vertical and horizontal planes (antenna polarity). These harmonics exceeded the allowed field strength of about 23db.System specs:
*150Mhz processor with a 75Mhz address/data bus located on what we call a processor board with memory and other cpu-related peripherals.
*6 layer board in this order from top to bottom: (1)component/trace, (2)split power plane, (3)trace, (4)trace, (5)ground plane, (6)component/trace
*processor board plugs into a backplane board which could be conceptualized as a "motherboard." this board provides power and the circuitry for driving high current outputs. It also has 5 additional connectors (68pin) for expansion cards. The address bus and data bus are run to these connectors along with power, and some other misc i/o.
*all signals entering/leaving the processor board use bidirectional buffers located on the processor board.
*NO signals have any kind of termination on either board. The scope shows no reflections and aprox a 1V overshoot on a randomly sampled data line on the processor board.
*clock line is 75Mhz sine wave and is routed to all peripherals on the processor board, through the buffers, and to all expansion connectors on the backplane board, again, no termination.
Maybe I shouldn't have expected it to pass?:
As a saving grace (maybe), the enclosure is not shielded and neither are the cables entering/leaving as of the FCC test. Now I have added a spray on conductive paint exactly for shielding plastic enclosures and I have changed the cables to include a sheild (foil or braid over foil) with the drains tied to ground through a pin on the connector (not the best but I cannot switch to metal housing connectors as they're not available)
I'm now at the point where I'm going to build the next revision of the board. I was told to add a filter to every i/o line possible entering or leaving the box. I have chosen a ferrite and capacitor in a two-pole style low pass filter which will actually end up being a T filter when im done as seen here ...
Questions:
1. what is the best possible way to route the clock line to significantly lower my RF emissions from it.
2. Is my method for adding the T filter to every i/o before the external enclosure connectors sufficient?
3. Do I need to terminate any/all of my bus lines? Why or why not?
Any other suggestions?
And of course, thanks for taking your time to help me.
