Schematic Drawings Multiple Sheets

[gb2835]

As an ME we often have parts and assemblies that take up multiple sheets on a drawing. I have been tasked with doing some electronic schematics for PCBs, and was wondering how/if something similar is done. The heart of my schematic is two separate 19x2 position connectors that go to a development board (Nucleo-64, which contains our MCU). There are many other components that will be populated on the board, but trying to fit everything on a single sheet (11" x 17") is just not possible without making it a complete mess. My EE colleagues actually don't make drawings and just create schematics as large they want (graduate students, no industry experience). Unfortunately, it is still very messy (wires crossing over components, looks like a spaghetti, etc.).

My thought is to just have the connectors show up on multiple sheets with different devices interconnected, but I have no idea of that is an acceptable practice. I'd like to create schematics with a drawing template for traceability, but for some reason cannot find what I am looking for. If anyone has suggestions I am all ears. For now I'm just creating revision table, a notes section, and a title block, but the sheet is not bounded so I can at least complete the schematics.

 

[IRstuff]

It's basically a combination of a topological and functional partitioning problem. You try to keep major functions together and arrange to have a minimum of connections cross the paper boundaries, and avoid having signals that have too many connections on both sides of the paper boundaries, since that makes troubleshooting a pain. Obviously, some of that is unavoidable, since as clock signals that have to go everywhere.

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[cranky108]

I'm on the power side, but we do have electrical drawings that extend up to I think I have seen over 100 sheets.
That said, we do a physical drawings, several schematics, with mostly the power extending over the boundaries. We also have an index, AC and DC breaker panels, physical device wirings, and cable schedules.
I would assume for electronics you would have simpler. I would not include device internal drawings (although only showing the finals is typical).