Symmetrical vs. Asymmetrical Faults - Three Phase Bolted vs Line to Ground

[djr3203]

All,

I have been a little unsure about this, so I was hoping the community could help clear it up for me. For a 3 phase, Wye distribution, I have read that a three phase bolted fault is a balanced fault and a single line to ground fault is an unbalanced fault.

If a three phase bolted fault is a balanced fault, does that mean the fault is symmetrical? Or does a three phase fault have an asymmetrical waveform with a DC decaying component similar to a line to ground fault?

Thanks for the help.

DJR

 

[davidbeach]

I think you're confusing two different things.

The 3-phase is balanced in that all three phases are equally involved, but each phase is still subject to its own DC offset depending on where on the wave the fault starts.

 

[magoo2]

Here's a couple of old current traces from a single line to ground fault (top) and three phase to ground fault (bottom). Traces are a, b, c and residual.

In this case, both fault types have some dc offset, or are asymmetrical. Depending on the point of the voltage wave on which the fault occurs, you could get some offset or no offset.

 

[djr3203]

Davidbeach,

Ah ok I see, I was mixing things up in my head.

Magoo2,

I would really like to see those traces but I don't see them in your post?

Also, can you tell me if my understanding below is correct:

If the network is an ideal, pure resistive network, the fault current would be symmetrical about the 0 axes. If the network is an ideal, purely reactive network, the fault current can have a DC offset from 0 to fully offset depending on the time of inception of the fault. Since networks are reactive and resistive, this results in the DC decaying component?

Why is the DC componenet decaying because of the reactance and resistance?

I really appreciate the help all. I know this is going into more theory than application.

Thanks,

DJR

 

[magoo2]

Oops!

 

[djr3203]

Magoo2,

Awesome thanks. Very helpful to see a trace.

DJR

 

[magoo2]

djr3203,

I think the purely resistive case is as you describe - no transient.

For the series R - L network, the current through the inductor controls how much dc offset you have. If the current through the inductor is zero when the fault occurs, you should have no dc offset; if it is near its maximum value, then you will have maximum dc offset.

The book on transients by Allan Greenwood is a pretty good reference for this topic.

 

[piterpol]

djr3203 and magoo2

¡wow! and thousand ¡wows!

Now I see, after many years, that a three-phase fault will NEVER be completely symmetrical!