Voltage Upscale and Downscale 2

[techaddiction]

Hi all,

First post! This place seems pretty friendly and full of helpful resources; I hope I can contribute the same amount that I gain from this site =)

Any how here is my question:

I have a system with three main components:

1. microcontroller with VDD @ 5V
2. a pressure sensor with VDD @ 5V
3. a wireless chip with a VDD @ 3V

In order for me to send signals to the wireless chip from the micro; I would need to downscale the voltage 3V instead of 5V.

I was thinking of a voltage divider but for some reason when I attach a load to my micro controller the output voltage drops to about 4.~ volts instead of the usual 5V.

Also, how can I upscale the voltage to 5V when I use it as an input to the micro (5V VDD) from my wireless chip (3V VDD)?

Any insight would be great on this topic. Thanks!

 

[Skogsgurra]

A voltage divider will not work very well. Most ICs with 3 or 3.3 V supply voltage are compatible with 5 V (TTL or CMOS) logic. Get the complete data sheets and read the DC characteristics section. Especially the logic threshold part.

If they are not compatible, there are buffers that take care of the differences in logic levels. Lots of information on the web. Just go for it!

Gunnar Englund

http://www.gke.org

 

[techaddiction]

Hey Gunnar,

I just needed the right direction; I will do some searching! Thanks a lot for your timely response.

Regards,

Garmond

 

[itsmoked]

http://www.maxim-ic.com/appnotes.cfm/appnote_number/3007

 

[techaddiction]

Hey Gunnar,

Thx for the link, I've looked it over. I think I will go and pick up some of those chips mentioned in the article.

In the mean time I went to my local electronics shop and picked up

Inverters and Diodes.

Upscale: 3V to 5V. I was thinking of puting the 3V logical high through two inverters that will convert the value to a strong 5V high logical

Downscale: 5V to 3V. I was thinking of place 2 - 3 diodes in series in order to drop the voltage down when the signal reaches the wireless chip.

I know that there will be a loop effect if I use the same pin for input and output on my microcontroller; so thats why a colleague suggested that I use one pin dedicated for input and one pin dedicated to output.

That way the loop will no effect the values when I am reading or writing data.

What do you think of this solution?

Thx,

Garmond

 

[melone]

The diode idea MAY work (but not good design practice), but I don't see how the 2 inverters will ever work. You have to guarentee that the output of your 3V circuit meets the VIH (Voltage Input High) of the 5V circuit. Typically, VIH is 0.7 * VDD = 0.7 * 5 = 3.5V. Therefore, the 1st inverter would never see a valid logic high from a 3V logic signal. Your best bet is to find a suitable level shifter.

 

[techaddiction]

Hey All,

I just bought this inverter during lunch and it says that Vmin High is 2V and I can easily output that from my wireless chip since the vdd on that is 3.3V.

What is the problem with using diodes? I was thinking of using a voltage divider BUT this will cause power loss.

Here is the inverter that I got:

http://www.onsemi.com/pub/Collateral/SN74LS04-D.PDF

I think that may work.

 

[BrianR]

The general scheme is to use a comparator/gate that has either an open collector output or dual Vdd. One end operates off 3V and the other off 5V. There are lots of level converter chips around.

 

[Comcokid]

I just recently did some designs where I had similar issues. 3 volt processor and 5 volt external logic. Open-collector (or drain) logic solves the issue. Also, some of the 'tiny logic' or other logic from Fairchild, TI, or ON Semi will tolerate 5 volt inputs when powered from a 3-volt source. See data sheets for devices like the ON Semi NL37WZ07US or Fairchild NC7WZ07 (both readily available from distributors). Some of these logic devices even present a high-impedance if their VCC is shut down which is great for some low power applications.

Refer to the following App note for the MSP-430 for designing resistor dividers. The MSP-430 is a 3v processor that sometimes must be connected to 5 volt logic. This is opposite of you issue but this app note provides a lot of info.
"Interfacing the 3-V MSP430 to 5-V Circuits" TI application Note: slaa148.pdf

 

[felixc]

Your 5V microcontroller probably has its signals stated as TTL-compatible levels. Check in the datasheet. It should say Vih at about 2 volts. Your 3-volt wireless chip should be able to drive its inputs directly without problems.

What micro are you goung to use?

 

[BrianG]

To answer your question about the diodes, if you use two forward biased diode drops from a nominal 5V output device it's true that it gets close to the 3V input you require. But consider what happens when the output of the 5V device goes to a logic low: the diodes are reverse-biased, so the input of the 3V wireless device is at an "undefined" logic level unless you also use a "pull-down" resistor.

Without a pull-down resistor, depending on the wireless chip technology if it's TTL then you can't sink the necessary "0" (low) state input current, so the input sees no signal change. If it's CMOS this is even worse since open circuit or effectively "floating" inputs can cause hefty currents to flow within the chip and may even cause it to be permanently damaged.

If the chip is TTL the pull-down resistor needs to be quite a low value, which in turn may load the 5V microprocessor output too much. CMOS is less of a problem since the resistor can be quite a high value and still get reasonable logic levels. |However, signal rise/fall times may then become a problem because of the overall C-R time constant. If the signal rise/fall is too slow this may cause oscillation within the wireless device logic.

Hope that helps explain the design consequences.

 

[techaddiction]

Hey Felix:

The Micro I am using is the ATMEGA16:

http://www.atmel.com/dyn/products/p...=607&family_name=AVR+8-Bit+RISC+&part_id=2010

I see that the Vih = 0.6 * VCC so about 5.5 * 0.6 = 3.3V

Which is a bit low; but then again my output from the wireless chip is only about 3V; So there may be some trouble with the logic there; I don't want to take any chances.

With an inverter the VinHighMin = 2V which is great for me.

Last Night I confirmed a wireless packet received using voltage dividers instead of the diodes..but I am concerned that this may bite me in power consumption later on.

Thanks for such an interactive thread =)

 

[melone]

Why don't you just use level shifters? That is the right device for the job!

 

[felixc]

You can operate the Atmega from 2.7 to 5 volts. Then keep things simple by using it at 3.3 volts. No more translation stuff. All you have to care about is the pressure sensor. Is it an analog sensor? If it uses a bridge, you will have to tailor the output of the bridge amp to fit the range of the A/D so fitting it to a 3.3V scale instead of 5 volts is the same thing. If it is a 0-5 volt output sensor, then all you need is to scale down its output with two resistors. If it is a digital output sensor, there are different options dependent on what your sensor is. What sensor are you going to use? If the ATMega tolerates 5V signals (you have to check in the data sheet) it may connect directly. It also depends if the sensor needs signals from the micro, and if these signals are TTL or CMOS levels. Tell us what your sensor's going to be.

 

[techaddiction]

Hey Felix:

I am using the following sensor:
ADSX030A2 which requires 5V VDD datasheet available here:

http://www.honeywell-sensor.com.cn/prodinfo/sensym_signal_pressure/datasheet/ASDX.pdf

For the micro I am using ATMEGA16 not the ATMEGA16L which can go all the way down to 2.5V I think. The micro requires a VDD higher than 3.3V I believe; I looked into that to try to save myself some time.

For the good news: I got was able to download packets sent from the receiver =)

My current implementation is with voltage divider for the downscale and two inverters back to back for the upscale. So far it works well.

I was wondering whether anyone could explain why using voltage dividers to downscale the signal is bad engineering design? Thanks all for the help =)

 

[BrianR]

It is good that you are receiving data packets, but to answer your question, a voltage divider is load sensitive and so signal levels may be unreliable. It also introduces time delays and distorts waveforms due to the R-C time constant, the C being inherent in the chips and the wiring. It is not good design to do this especially when the correct solution is so simply and cheaply available.

 

[techaddiction]

You have got to love the brians in these forums =)

Thanks guys.

 

[itsmoked]

Yes his last sentence was a nice summation of skogs very first response to this entire thread.[flush]

 

[felixc]

If your mcu is 5 volts, then the sensor can drive an analog input directly.

If you are not using the "L" version it is a 5 volt part. Too bad for the other interface.

Are the signals bidirectional between the micro and the RF unit? Or just in one direction?

 

[techaddiction]

Felix:

Yeah it is bidirection; only for one signal though; the data pin. But this doesn't pose a problem though =)