Why DC offset in fault currents? 9

[veritas]

This may seem like a very basic question but it is one I struggle to conceptually understand. Can someone explain in words why is there DC offset (or a dc transient) in fault currents? I know all the formulas to calculate maximum offset, etc. but must admit I do not find the physics behind it easy. I know it has to do with the point on the voltage wave at which the fault occurrs and also the X/R of the system but to put it all together...

Thanks in advance.

Veritas

 

[electricpete]

I haven't read all the posts. I'm sure lots of good info. I did notice that Gunnar had some objection to my response which I don't understand. I think he is objecting to the fact that I analysed the situation of applying voltage to an inductive circuit, while the question was about a fault. It is the same situation. If you have a voltage source supplying a load through an inductive impedance, the voltage drop occurs primarily on the load. If you apply a short circuit accross the load, the voltage drop now appears accross the inductance. Same thing as closing the switch to increase voltage accross the inductance.

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[electricpete]

I agree with veritas on the point that inductance is required somewhere in the circuit for the dc current offset to occur... either upon energization or during a fault.

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[electricpete]

If the objection to my original post has to do with equations rather than words, then I would suggest to do the integration graphically. It tells the story on a pretty intuitive level imo.

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[ePOWEReng]

If you interested in a good reference, take a look at "Transients in Power Systems" by Greenwood.

 

[Skogsgurra]

Hmm..

I have to think about what you are actually saying.

I also think that some should think about what I am actually saying.

The OP was about how a DC components can exist in a fault situation (Quote: " Can someone explain in words why is there DC offset (or a dc transient) in fault currents?").

My very simplistic (that seemed to be what the OP asked for) explanation focused on the reason why there is a DC component. And I showed that the average value of a sine does get a DC component if started at any other phase angle than 90 or 270 degrees. That was all I said. And I thought that was what the OP asked for.

The L/R time constant in the circuit, of course, then dictates what happens to the DC component. No discussiuon there. I may have expressed myself unclear (the "contradiction" part) when I, as veritas says, talk about a circuit with no inductance and then, in the next sentence, mention that the L/R determines what happens to the DC component. But, if you read that sentence, you will see that there is no contradiction in it. (Sorry to be JB-ish here, but when I feel misunderstood, I need to explain myself). I have said that you get a DC component also without any inductance. I did not not say that there is no inductance. Only that you can get a DC component also with no inductance. What then happens to that component is dependent on the L/R ratio. If it is zero, then the DC dies away instantly. If it is >0, then it decays according to 1-exp(-L/R).

Sorry if you either think that I am completely ignorant or if you think that I try to tell lies. That was not my intention. All I wanted to do was to explain in a simple manner from where the DC component stems. And I still think that I did that. And I do not think that I am completely ignorant either.

This is, I hope, my last say in this thread.

Gunnar Englund

http://www.gke.org

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100 % recycled posting: Electrons, ideas, finger-tips have been used over and over again...

 

[electricpete]

Gunnar - It was never my intent to rank one explanation against another. You are the one who objected to my explanation.

I have the highest respect for your opinion in general, but I think you have missed the mark on this particular item. The dc offset is a characteristic of change in configuration of an inductive circuit imo. Your explanation 7/19/07 as I understand it is dependent upon time of fault clearing... but dc offset occurs during change of configuration of an inductive circuit even when the fault doesn't clear.

You are correct that the dc offset depends on the time of fault initiation. That can be seen by integrating a sine wave I = (1/L) * Integral (vl dt) where vl is voltage across the inductor. Assume vl(t) = V sin(w*t). If you start integrating at t = +/- Pi/2 you jump smoothly into the steady state solution i(t) = -/+ cos(w*t) * V/(L*w). If you start integrating at t=0 or Pi, you have the worst case fully offset sinusoid. If there is a series resistance, the offset decays away.

To make an attempt to simplify my previous explanation, we simplify the circuit and get rid of the ac. Consider a simple series switched R/L circuit fed by a DC voltage source switched on at t=0. The response to closing the switch at t=0 is i(t) = V/(R) - V/(R) * exp(-t*L/R). That response has two term. The first of these terms is the steady state response (which happens to be dc in this dc case, but in general is not necessarily dc).. The second of these terms is the transient response. This transient response is analogous to what we're calling the dc offset during a fault IMO.


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[electricpete]

One correction:

"If you start integrating at t = +/- Pi/2 you jump smoothly into the steady state solution i(t) = -/+ cos(w*t) * V/(L*w).'

should be:

"If you start integrating at t = +/- Pi/2 you jump smoothly into the steady state solution i(t) = -cos(w*t) * V/(L*w).'


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[jghrist]

To say that there is a dc offset in a resistive circuit just because the current starts off positive is misleading IMO. In a resistive circuit, the current will be sinusoidal. Let's say the current is I·cos(wt). This is positive at time t=0, but to say that there is a dc offset is not correct.

It is easier to visualize the problem with a purely inductive system. In this case, the voltage across the inductance equals the driving voltage which is a sinusoid. The voltage is L·di/dt. The current will also be a sinusoid, with or without a dc component.

Because the current across the inductance cannot change instantaneously, it starts out at zero no matter when the fault occurs.

If at the point of the fault, the voltage is at a maximum, then di/dt is positive and at a maximum. So current is increasing with the highest slope. When the voltage reaches zero, di/dt must be zero, and the current reaches its peak. If you follow this through a whole cycle and plot out the current, you see that you get a sinusoid with no dc offset.

If at the point of the fault, the voltage is zero and rising, then di/dt is zero. As the voltage increases, di/dt and i increase. When the voltage reaches a maximum, di/dt is a maximum, with the current still increasing. When the voltage is gets to zero, di/dt is zero and the current is at a maximum. When the voltage goes negative, di/dt is negative, but the current is still positive. If you follow this through a whole cycle, you see that you get a sinusoid with an offset equal to the peak current so that the minimum current is zero.

 

[electricpete]

I agree with jgrist and many others.

To revisit the integration approach one last time:
I have made the graphical integration easy.

The scenario is: sinusoidal voltage source (Vmax*sin(w*t)). By definition it always has zero-crossing at t=0.

The voltage source is connected to the inductor (undamped) at some variable angle theta (or delay time) after t=0

You can vary the angle in the attached spreadsheet and watch the offset appear for theta=0, 180, disappear for theta = 90, 270.

(How this relates to fault: fault causes a sudden decrease in load impedance and sudden increase in voltage seen across the inductor.)

http://home.houston.rr.com/electricpete/eng-tips/ApplySinusoidVoltageToUndampedInductor.xls

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[electricpete]

fwiw, I revised the spreadsheet above so you can specify L and R in addition to the time delay (in degrees) to see a damped response.

http://home.houston.rr.com/electricpete/eng-tips/ApplySinusoidVoltageToDAMPED_Inductor.xls

For example, you can see the initial input data with X/R ~ 13, gives a true peak at first half-cycle of 178% as high as the "steady state" peak that would exist after the transient is gone.

In my mind, this represents not only the type of transient that is seen on a fault, but also during motor starting and during transformer inrush... except for the transformer inrush the high exciting current due to dc offset creates saturation which leads to significant harmonics in the current waveform (not modeled here).

If anyone is interested, the method I used to simulate the LR circuit is derived as follows:
v = L di/dt + IR
L di/dt = v - IR
di/dt = v/L - IR/ L
di = v/L dt - IR/L dt
I = Int v/L dt - Int IR/L dt
Let k = current time, p = previous time (p = k-1)
Apply trapezoidal rule: Xk = Xp + 0.5(X'k + X'p)dt
Ik = Ip + 0.5*(Vk+Vp)/L dt - 0.5*(Ik+Ip)R/L dt
Ik (1+0.5*R/L dt) = Ip + 0.5*(Vk+Vp)/L dt - 0.5*Ip*R/L dt
Ik = {Ip + 0.5(Vk+Vp)/L dt - 0.5 IpR/L dt} / (1+0.5*R/L dt) [THIS IS THE EQUATION USED IN SPREADSHEET]
Ik = {Ip + 0.5(Vk+Vp-Ip*R)/L dt } / (1+0.5*R/L dt) [SIMPLER FORMAT OF SAME EQUATION]

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[slavag]

Dear Electricpete.
Thank you!! Your material is very intresting and helpfull. As Gunnar saied "Great discussion - and needed".
Thank to all of you.
Best Regards.
Slava

 

[RalphChristie]

Pete:

PLS for you

I do not think anyone was totally wrong in the discussion, it was just explained from different angles and viewpoints and with different examples. With the lack of pictures it is sometimes difficult to visualize the examples and you have done well by creating a spreadsheet for better understanding. Words are good but words and pictures together are great! Well done!

By using any example that fits into what you are used to, the concept can be clearly understood, and in the end it is the important thing - a clear understanding of what is going on.

Regards
Ralph

[red]Failure seldom stops us, it is the fear for failure that stops us - Jack Lemmon[/red]

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[rbulsara]

Homersjs78 deserves a star for simple and accurate explanation.

 

[electricpete]

Please correct me (anyone) if this is too simplistic or down right incorrect:
The system contains inductance which stores a charge. In the case of a fault, the inductance contributes energy in the form of DC current. As with any stored charge / energy, this decays according to a time constant.

I would respectfully disagree. To me it sounds like the idea being portrayed is that there is initially energy stored in the inductor at the time of the fault, and the fault allows this initially stored energy to decay with the L/R time constant.

I would like to show a counterexample which proves this wrong.

Start with an assumption that we have an ideal power supply feeding through an inductance (perhaps a transformer) to a line which has no loads prior to the fault. The initial energy stored in the inductance prior to the fault is zero. Now close in a low-resistance representing a fault on the transformer secondary at the moment the voltage is zero. We get the maximum dc offset. It didn't come from the energy initially stored in the inductor, because that energy was zero in this case.

At the risk of being really obnoxious, let me try another explanation expanding on what others have already said:

1 – ASSUME for simplicity the post-fault circuit has no resistance.

2 – ASSUME for simplicity the prefault current is negligible, i.e. i(0-) = 0.

3 - The total post-fault response consists of a steady state sinusoidal response plus a transient response.

4 - The current cannot jump when the fault is applied. i(0+)=i(0-) (since it is flowing through an inductor).

5 – Putting together 2 and 4, we see that the total response at t=0+ is 0. Itotal(0+)=0.

6 – Putting together 5 and 3, Itotal(0+) = Itransient(0+) + Isteadystate(0+) = 0

7 – Examining 6, the only way we can have NO transient is if Isteadystate(0+) = 0

8 - Isteadystate(0+) = 0 occurs only if we close the fault at a phase angle where the steady state solution for current is 0. This occurs only when the voltage is at its peak (since current lags voltage by 90 degrees in steady state inductive circuit).

9 – Examining 7 and 8, if you apply the fault at any time other than the maximum or the minimum of the supply voltage, you will have a transient component of the current (the exponentially decaying dc component). That transient current occurs as a direct result of the characteristic of an inductor v=L di/dt and we can calculate it directly from the corresponding integral equation i = Integral v(t) dt + i(0)

It is not a dissipation of energy stored before the fault. It is a transient response. In general we expect a transient response when the system configuration changes. The transient response in a simple L/R system will always be of the form I(0)*exp(-t*L/R)

I am a hearty supporter of the idea that there is not only one right answer. There were good answers given by many others. Mine is probably not the simple answer some people are looking for and mine is not without equations as was requested in the original post. My apologies. Feel free to comment. Otherwise I will shut up.


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[electricpete]

some obvious errors:
"i = Integral v(t) dt + i(0)" should be "i = Integral v(t) dt/L + i(0)"

"I(0)*exp(-t*L/R)" should be "I(0)*exp(-t*R/L)"


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[sslobodan]

Sorry i got this late into conversation BUT i think that the guy with post above hit the spot. When you have integral I(x) you have constant that is result of beginning state (the thing you neglect) and that component is constant, as we all know from basic of electrotehnics constant current is usually called DC current which is answer to original question. That i(x)=C (as a constant) is a consequence of beginning state when malfunction occurred and has some to do with the type of malfunction (symetric or asymetric ) and is one of tree components (Id - direct Ii - inverse Io - DC component ) It has been a long time since I had this subject on college so to make a more profound explanation I would have to read some 200 pages of my book from Analysis of EE systems, so I believe who wants the more detailed explanation of DC component would have to do the same. Unfortunately I don't know any book of such kind in North America because I never lived there so if anyone knows such he should post it here ....

 

[rbulsara]

Electricpete:
I have high regard for your math skills. But this is not about math but grasping a concept. Poor electricity does not undestand or even know math. Math is a means to analyse many phenomena. So it does not matter how it is explained by math. A waveform can be resolved into any number of compoenets to arrive at a final waveform. Assuming DC component fits the mathematical explanation for the Asymmetry in fault current wavefors. (This is very akin to resolvoing vectors in x and y rectangular component for anaysis). The fact is the system behaves as if it has a DC component which can only come from some sort of stored enegy being discharged. Also math is not what OP was looking for.

I still believe that homer's explanation is valid enough for a concept.

 

[jghrist]

The fact is the system behaves as if it has a DC component which can only come from some sort of stored enegy being discharged.

But if there is no current before the fault, as Electricpete noted before, where is the stored energy? There will still be a DC component if the fault occurs at the right time (0° for a purely inductive line). If there is current before the fault, you could say there is stored energy in the line inductance, but if the fault occurs at 90°, there is no dc component. What happened to the stored energy?


I agree that these discussions do not give a good physical description as the OP wanted, but it's hard to describe physics without math. I think Davidbeach's original post gives the best physical explanation.

 

[davidbeach]

Thanks jghist, I was feeling rather ignored.

 

[Skogsgurra]

What about me then? Not a single PLS... :-(

Gunnar Englund

http://www.gke.org

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