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Invisible power pins in CAD

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zeitghost

zeitghost

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Oct 8, 2003
400
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Hi guys.

Another tedious CAD question.

A number of packages I've used, Orcad, Cadstar, Vutrax etc. have invisible power pins on stuff like ttl and amplifiers.

The ttl stuff generally has pins defined as Vcc and Gnd.

The analogue stuff has pins defined as Vpos, Vngeg, and Gnd.

4000 series Cmos has pins defined as Vdd and Vss.

To connect the power pins to the gnd and +5V busses, you generally name the buss as "GND" and "VCC" or whatever.

With a mix of devices, such as ttl and 4000 cmos this gets a little difficult.

Both sets of devices run off the +5V buss, but the package won't let you give it two different names.

So how do you get around this?

Up until now, I've used a zero ohm resistor so that one side of the resistor is defined as VCC and the other side is defined as VDD.

How are you supposed to do this?

Coz it looks decidedly unusual on the schematic...

rgds
Zeit.
 
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I don't use ANY of those cad packages but I often use that same method... Resistor.

You should however always be able to change the names on your parts! Often You could have three or four vcc busses and that you may want some parts on different power nets. This means you MUST be able to specify this. Look at the part definitions as this is where that is done.
 
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In the package I use, parts are declared in the library utility, where there is an option to hide the power pins. To do this, a pin is declared as being of type POWER and then it is assigned to a named net. If this net does not exist in the schematic where the part is used, an error will be generated. The feature is nice for parts like op-amps and logic gates that have multiple gates per IC in that it makes it easy to place schematic symbols for (parts of) one IC all over the schematic.

Personally, I have found that in the long run, this feature makes circuit troubleshooting more difficult as it isn't obvious from the circuit diagram where the power pins are or what they are connected to. I usually place all of the gates in one symbol package and leave the power pins on the symbol to avoid later confusion.

 
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While not as ideal of a solution as getting all of the packages to have the same bus names, I usually get around this by having one wire tied to the main bus (say, +5V) and all of the other nets tied to it with power connectprs (Vdd, Vcc, etc.). Essentially, on the power supply schematic there's a short wire with multiple power nets connected to it and nothing else. no need for a resistor.

Dan
Owner
 
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Hi, the answer is to not use the supplied libraries, they are riddled with errors anyway.
 
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I've argued against these hidden pins for my entire career. Sure, they make the schematic look pretty, but that also means they often get overlooked. As soon as a design needs a split GND plane (AGND, DGND, etc.), or even worse, a level shift (i.e. TTL running between 10V and 5V) things get mixed up (respin, $$$) unless your board designer is top notch.

Now about that GND symbol...
 
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In OrCAD you can make them reappear by going to the part editor, then editing the pins properties.

You can also on a more general level edit the properties of the part itself (double-click the part while in the part editor) and enable the display of the pin names and numbers.

This is all explained in the help menus of OrCAD.
 
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Yeah I always put the power pins on my parts. That way when I'm trying to figure out what I've screwed up with a scope on the bench I can see at a glance what pins are power and graound.
 
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One trick I have used is to define a 1206 resistor which had a short circuit built into the copper layout. I suspect the pads were not directly shorted but had a 0.02 thou gap which would prevent the software getting upset but would still work correctly! This way you can define the routing to give nice star points in ground paths. Unfortunately the part was designed by a proper pcb designer so I don't know the details. I think there was also a way to connect two differently named nets together using a special circuit symbol but again I don't know the details.
 
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Your technique is okay if you really want them routed separately and then joined at a single point. Or joined by other means at the layout. Joining planes is a weak point for many layout packages.

Otherwise can't you just make a schematic connection between Vcc and Vdd, or whatever other node or global?

In any case, you can't escape verifying the netlist before going to the layout package.
 
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Nah.

Can't join Vcc and Vdd global signals to the same net.

The CadStar schematic capture utility throws a wobbly & gets all upset... thus the 0R resistor.

One of my favourite bugs with Orcad was placing 74 series symbols too close together so that the gnd and vcc invisible pins got connected together.

A little difficult to debug the first time you meet it...

And don't get me started about the time it connected all the signals on a keyboard interface together because one signal on the schematic crossed at just the wrong place. Lots of green wires on that pcb...
 
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That should be fun making ground planes with such limitations.

Is this an old version of Cadstar?
 
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