Analyzing a grid of resistors 3

[handleman]

Hiya Sparkies!
I am sure this is going to be a very noob-sounding post, but it's been a few years since my Circuits class...

I have what is essentially a ladder-shaped arrangement of resistors. Each "rung" of the ladder is a resistor, and each segment of the "legs" from rung to rung is also a resistor. I can't disconnect any of the junctions, but I'd like to know the resistance of each segment. I can check the resistance from any junction to any other junction pretty easily, but I know that every measurement I can take is going to end up with a bunch of parallel resistors in the path.

I can't assume symmetry of resistance values on any portion of the ladder, so I am guessing that if my ladder has "n" resistors then I need to take at least "n" measurements, but I don't have a great idea how to set up the measurement points and forumulas/algorithms I should use to do this most efficiently. My fear is that it ends up being a huge system of equations with "n" unknowns, and "n" is in the neigborhood of 30.

The other wrinkle is that I am afraid that variability in my measurements may lead to a system of equations that's un-solvable. The resistance values are (ideally) in the 10s of ohms range. Right now the measurements are taken manually with a DMM, and I can't be entirely sure that if I measure from A to B, then A to C that point A was exactly the same point electrically. At some point I hope to build a jig with multiple probes and switches such that I can take every measurement without moving any probe and just switching the electrical paths. I hope that makes sense... any input or guidance to kick this off in the best direction would be appreciated!

 

[VEBill]

For measurements in the face of parallel paths, one may use 'Guarding' techniques.
Here's a description:

http://www.ni.com/white-paper/3486/en/

For calculation, one uses Kirchoff's Laws.
Here's a reasonable description:

http://www.electronics-tutorials.ws/dccircuits/kirchhoffs-voltage-law.html

 

[VEBill]

Decades ago, I was involved in In-Circuit Test (ICT) of assembled circuit card assemblies. Measuring resistances was made trivial, even with parallel paths, because the system allowed us to simply specify a list of nodes to be guarded. The system applied the necessary guards.

To be clear, if the parallel path didn't contain any intermediate nodes, then it couldn't be guarded.

For example, if the circuit had two 1k resistors in trivial parallel, then one simply looked for 500 ohms.

But if the 1k resistor under test had a more complex parallel circuit (such as two 500-ohm resistors in series), i.e. the unwanted parallel path having an intermediate node, then the guards would be applied to the intermediate node(s), within the parallel path, and the desired and correct 1k measurement appeared like magic.

The ICT system made it very easy.

--

Given measurements of a network with a handheld DVOM, you might be forced to just perform sanity checks of each resistor, and compare it to the calculated value using circuit analysis.

 

[handleman]

Thanks, VE1BLL! I had never heard of that "Guarding" technique before. Ignorance of an ME...

Here's some more ignorance:
Based on my "ladder" type grid layout, I always have at least one intermediate node, right? Such that, given the picture below, if I want to find R1 I can apply the guard at the "intermediate node", and the equivalent Requiv becomes the R2 from the NI diagram? Does that sound correct?

 

[IRstuff]

Guarding is one approach, but brute force and ignorance can go a long ways. If you shorted the distal ends of R1 and R2, you'd only be measuring the parallel resistance of the two of them.

The objective of the guard is to drive the voltage across R2 or R3 to zero. If the voltage is zero, then there is no net current flow away from R1 into either node. which effectively isolates R1 from the circuit.

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[VEBill]

Ref your image, to guard the measurement of R1, you'd guard the right hand ends of R2 and R3 (two guards). Similarly, guarding the measurement of R5 may require four guards. This is based on my experience with a very expensive (megabuck class) ICT station with plenty of Guards available.

IRstuff has given a wonderfully concise explanation of guarding.

And I fully agree that one could bang through with a series of measurements to determine the resistances of each resistor using a simple (non-Guarding) DVOM. If I were at work, then I'd ask if we had a fancy DVOM with guards (we probably do). But if I were at home, then I'd open up a spreadsheet and start gathering combinational measurements. With the shorting-out technique mentioned by IRstuff, the equations should remain relatively localized. I'm assuming that this approach would work, not leading to an unsolvable set of equations. It seems like a safe assumption. I'd actually bet that it would be overly-constrained, having more data than necessary.

Plus, I'm assuming that you're testing a system with data, and marked resistors. Pass/Fail testing with tolerance ranges is much easier than reverse engineering and gathering very precise results.

 

[handleman]

Thanks, guys! I really wish I had a system with data and marked resistors... We're actually fabricating something conductive, and shooting for the lowest resistance we can get. I'm trying to figure out a good way to pinpoint how good a job we did.

 

[waross]

As I understand it, to measure R1, you must guard either R2 or R3 but not both.
For example if you guard R2, there will be no voltage and no current flow through R2 or through the R1-R2 connection, hence no need to guard R3 or R5.

Bill
--------------------
"Why not the best?"
Jimmy Carter

 

[IRstuff]

Per Kirchoff's current law, that would be correct for the circuit shown. The zero net current going through R2 ensures through KCL that no net current goes through R3, i.e., conservation of current.

For measuring R5, both R3 and R6, or both R2 and R4, would need to guarded, but not all 4.

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[waross]

That is my understanding also, IR stuff.

Bill
--------------------
"Why not the best?"
Jimmy Carter

 

[IRstuff]

I wouldn't normally have remembered all that, but just about a month ago, I was helping my kid with his frosh EE class.

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[VEBill]

My distant recollection, going back 25 years, is that our monstrous In-Circuit Tester had the capability of applying effectively endless guards. So we gleefully sprinkled them around the adjacent nodes (done by typing the node names into the Guard List in the test program), only occasionally having to fiddle with them to get a sensible reading.

 

[IRstuff]

Seems like I was a bit remiss in not asking how you know they are resistors, and whether anything is attached to the internal ladder nodes. There aren't that many reasons for having only a 2-port ladder network, and none of them would have a ladder purely made of resistors.

> R-2R network is used as voltage divider to typically give exact factors of 2 division from one node to the next, and is typically found in an analog to digital converter. Internal nodes would strictly be outputs

> diode/capacitor ladder is used to capacitively pump up a voltage, and internal nodes would be connected to transistors and the ladder would be one-sided

> RLC network is used to shape a pulse output, and is probably the only configuration with no connections to internal nodes.

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[handleman]

Thanks, IRstuff...

I know they're resistors because they resist current... :-D

But really, as I mentioned before, we are fabricating something using a method. That's all I can really say about it, trade secrets and all. It's really not a circuit, there are no electronic components in it anywhere. But measuring the resistance at various points is a good indicator of how good a job we did fabricating it. Right now we measure a bunch of locations, but due to parallel paths we don't really isolate what parts are good and what are bad. A really good section can mask a nearby bad section. Does that make sense?

 

[Skogsgurra]

Sounds like you get some heat out of that device.
I checked sheets of conducting rubber once. In my case it was about mimicking an electric field and how certain metal shapes influenced that field and it was important that the rubber film had the same conductivity all over the surface.

We applied a voltage across the end connectors and looked at the film using a thermal imaging device aka IR camera. We could then see irregularities in the film with quite good resolution. There were end effects, of course, but we knew what they should look like and it was easy to see irregularities also in those regions.

It sounds like your film (typically tens of ohms) could be easy to heat with a moderate voltage and if it can take 20 to 40 C extra heat, that could perhaps also be used in this case. An additional benefit was that we could store the images for QA purposes.

Gunnar Englund

http://www.gke.org

--------------------------------------
Half full - Half empty? I don't mind. It's what in it that counts.

 

[IRstuff]

"A really good section can mask a nearby bad section. Does that make sense?"

Sort of; I would question the notion of "really good" because something either meets specifications or doesn't. We've NEVER done anything like that on any thin film or deposition process in a previous fab. Poking at things in mid-process simply introduces more defects. Process design and control are what ensures compliance to requirements.

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[MacGyverS2000]

I'm imagining an alloying process that doesn't achieve good mixing at the atomic level over a macroscopic-size area, creating "bad" spots surrounded by "good" spots. Sounds like a valid test methodology...

Dan - Owner

http://www.Hi-TecDesigns.com

 

[IRstuff]

It still seems a bit cumbersome of an approach; there are possibly better ways to detect regions of poor alloying or whatever, testing after the fact and finding failure just means you made a bunch of bad parts. Normally, horsepower would be better spent figuring out how to make the process more robust.

The Japanese used to be really good at that. Hitachi once second sourced a part to us, and the mask set came without in-process monitors, since that would sacrifice 5 die positions in the prime parts of the wafer. Our process engineers were completely discombobulated by not being able to make measurements in the middle of the process. Moreover, Hitachi wouldn't tell us what the target process parameters were supposed to be. So, everyone shook their heads and ran the first lot of parts through our line. That lot yielded better than all the other parts that were specifically designed for our process! The second lot did even better than the first. The point here is that they designed the part to essentially be bulletproof, so no complicated testing scheme/process is even required.

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[handleman]

Thanks, IRstuff. We have an upper limit for resistance, but not a lower. No such thing as 'too little' resistance for this thing. We are kind of in transition between lab prototype and full production. Better process control is definitely needed, but requires automation that will cost more than we have budget for during the transition, so we're stuck with trying to inspect better for now.

 

[IRstuff]

If the goal is to get extremely low resistance, it's likely that it'll nearly impossible to distinguish or isolate small regions of high resistance.

Is some sort of eddy current testing possible?

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