Anyone with ATA memory I/F design experience?

[EEMS]

I am trying to find someone who has some experience designing interfaces with a component built off the PATA standard. Preferably in a non disk drive/cabling interface, but more of a FPGA based interface control for the memory on same PCB -- granted any ATA interface experience could help answer some of my questions regarding if this is the optimal path, developement issues, limitations, etc?

I want to use an FPGA to control this memory device which is an 8Gb NANDrive, PATA memory with built in MCU to translate host signals/commands/ and media wear leveling, etc.

The device I am looking at is

http://www.greenliant.com/products/?inode=46308

I have read that SATA memory devices (serial vs parallel) will be taking over, but I assume (and hoping for confirmation on my assumption) this information was strictly referring to the PC based disk drive/cabling interface application since the serial uses less I/Os, but for other applications (recording streamed telemetry data), I would think there will always be a strong market for these PATA devices.

Any info is greatly appreciated!

 

[IRstuff]

I think that's an incorrect assumption, based on the fact that SATA drives outnumber PATA by about 7:1 in retail stores, and none of the PATA drives appear to have density comparable to the SATA, which implies to me that producers are no longer supporting that interface.

So, if I can't get the largest capacity drives in PATA, why would I use that interface? eBay doesn't even recognize "TB PATA" as a search phrase, and changes it to "TB SATA"

TTFN

FAQ731-376
Chinese prisoner wins Nobel Peace Prize

 

[VEBill]

SATA III is fast enough (and is probably at the optimal state of maturity) that it would seem to be the obvious choice. You could probably still use a SATA II SSD if required, leaving the SATA III capabilities for future growth.

If just need the hardware solution and you'd rather not design and build it yourself, I know of a custom design house in the area of Washington, DC that has experience in this area.

 

[EEMS]

Well S-ATA is not an option with an FPGA since we require >20MB/s transfer rate, which is not going to happen with SATA given our limitations on PCB size, FPGA density, etc. I should have elaborated a little more, so let me do so now. ...some info is repeated, but more clarification is added. I agree that S-ATA is better, but not feasible given our design limitations.

Anyway, I am currently looking at the newest technology trends pertaining to non-volitile memory since we are looking to designing a small form factor FPGA based PCB that can record TDM data at >20Mbytes/sec, >8Gbytes, and has smallest package.

Thus far, PATA NANDrive memories seem to be the best when attempting to optimize performance, density and real estate for this particular application. Cannot use SATA as the clock frequencies will be too high. I am new to the ATA standard as this is normally interfaced to a Host via a cable using Ultra DMA data transfers. I am concerned there are better memories out there that I dont know about. Does anyone have any other recommendations or am I on point with this component? See link below.

All in all I am looking for confirmation that an FPGA is adequate for controlling this device I found below (since device has built in NAND controller) and that this is the best path to take.

The device I am looking at is
Greenliant > Solid State Storage > NANDrive > GLS85LP1008B
which has a built in NAND controller, so it seems using an FPGA to interface with this would not be an issue or too costly. Would you agree with this??
I want to use an FPGA to control this memory device which is an 8Gb NANDrive, PATA memory with built in MCU to translate host signals/commands/ and media wear leveling, etc.

To me it appears the internal NAND Controller opens the market up for this product to be used in any application requiring fast memory aquisition of a high density memory device with minimal real estate usage? Please correct any misunderstandings on my part.

I have read that SATA memory devices (serial vs parallel) will be taking over, but I assume (and hoping for confirmation on my assumption) this information was strictly referring to the PC based disk drive/cabling interface application since the serial uses less I/Os, but for other applications (recording streamed telemetry data), I would think there will always be a strong market for these PATA devices.

Sorry to be repetative, but again I am hoping to get confirmation that an FPGA is adequate for controlling this device (since device has built in NAND controller) and that this is the best path to take.

Any info is greatly appreciated!

 

[VEBill]

No matter what parts you choose, they'll be more-or-less obsolete in several years. The trick is to jump on the up-and-coming standard, as opposed to the trailing edge.

I can't comment further on the FPGA details as your 20MBps data rate is bytes/bits faster than anything I've seen in person.

 

[EEMS]

Thanks VE1BLL for your thoughts on obsolescence which is always a concern. What are you suggesting is the up and coming standard? S-ATA has been around since 2003 right? Noramlly part obsolescence is tied to the market, so what would be replacing this particular application where serial data is not feasible. FPGAs are consistently becoming more and popular as they are bridging the gap between previous limitations and ASICs, and the design complexity in FPGAs when using clocks over 200 Mhz skyrockets when wanting to actually use a decent amount of the resources.

 

[IRstuff]

Given that you've not even indicated what FPGA you're using, how can anyone comment on its usefulness for this application?

Nonetheless, there are FPGAs that can trivially handle the data rate, which, by modern standards is pretty slow. All of the major FPGA families can run in excess of 1 Gbps per pin. 20 Mbps/pin is rather slow for most FPGAs.

TTFN

FAQ731-376
Chinese prisoner wins Nobel Peace Prize

 

[VEBill]

SATA III is quite fresh. And so far they've provided backwards compatibility. The physical size of what's on the market needs to match your space limitations.

Obviously, one would try to use an off-the-shelf chip that interfaces directly to the SSD. The only truly creative design work should be where your unique data format needs to brought into the system. The rest should be pretty standard computer architecture.

There seems to be a very short capture period (8GB/20MBps = 7 minutes). This implies that your power budget isn't going to be overly strict. (?)

 

[EEMS]

IRstuff -- FPGA fam is completely irrelevent, however its will be >2Meg part. Also theoretical values in FPGA datasheets is very different than practicality. ...never heard of anyone acheiving a 1Ghz sophisticated FPGA design, not even 1/2 that. Serial will require >160Mhz clock, which yes its possible, but not optimal.

 

[IRstuff]

??? Who said anything about "sophisticated FPGA design?"

We were, I thought, talking about I/O rates, and the point was that an I/O pin designed for >1Gbps operation should have no problems doing 20Mbps.


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