Electrolytic capacitors - low voltage/reduced capacitance 1

[Skogsgurra]

I am running a column in the Swedish paper Elektronik i Norden

http://www.elinor.se/hur-gammal-kan-elektronik-bli.html/

where different topics are covered. A Little like Bob Pease did in Electronic Design.

A question about elctrolytic capcitors and how capacitance changes with voltage was brought up and I ran a quick test.

The result: Yes, there is a reduction when going from near rated voltage down to one tenth of that voltage. The measured change was between 3 and 8% for capacitors in the 1 through 47 uf range with 50 V rated voltage.

Considering that tolerances for these capacitors usually is -20% and +50% I don't think that it matters much.

Question: Does anyone among the readers have any experience where this capacitance variation has been a problem? Any other Comments?

Gunnar Englund

http://www.gke.org

--------------------------------------
Half full - Half empty? I don't mind. It's what in it that counts.

 

[VEBill]

"I applied a voltage from a generator and that resulted in a current."

So how did the current 'know' to go up or down by about 25ms IN ADVANCE OF (leading) your 'applying the voltage'?

(See your graph, in terms of relative leading/lagging. Relative phase of the sine waves.)

The solution to this apparent discontinuity in the spacetime continuum is that you actually applied a current (to the capacitor) and then the voltage (on the capacitor) followed, lagging by about 25ms.

With this corrected wording your graph becomes in accordance with ELI the ICE man and thus makes perfect sense.

Yes, it took me about a minute of head scratching to figure out why your graph + wording defied cause-and-effect (see your graph). I was forced to doublecheck my recollection of 'ELI the ICE man', and then it finally fell into place.

So: Red is current applied (to the capacitor). Blue is the (resultant) voltage (across the capacitor).

Apologies, but the Axis of Time is something that I really pay attention to. And 'ELI the ICE man' (current/voltage leading or lagging inductors/capacitors) is still ringing in my ears from when I first learned it. So the discrepancy of your description (versus 'cause and effect') really jumped out at me.

Hopefully you can now see what I'm referring to.

 

[Skogsgurra]

Not really. We both know that in a complex coordinate system, and if phasors describing voltages and current, the current leads the voltage. Not because it knows that it shall. And not because of any quantum or relativistic effect. But because the charge that the capacitor picked up gets discharged when possible. And it is possible when the sine voltage lets it do so.

There's no need for nursery rhymes like ELI and ICE. Such "help phrases" are of no use if one understands simple physics. They are just as useless and confusing as the beer&froth parable that seems to be in use in certain groups.

To take the reasoning further: If one plugs a toaster (assuming the plain vanilla resistive kind) - is it the current flowing in the heating wires that causes the voltage? Or is it the fact that the voltage is present in the outlet and ready to do its work whenever it is given the possibility?

Gunnar Englund

http://www.gke.org

--------------------------------------
Half full - Half empty? I don't mind. It's what in it that counts.

 

[VEBill]

It wasn't my intent to make you angry and upset. Apologies if I have done so.

 

[IRstuff]

The "lead" is misleading ;-)

The physics model can be expressed as i = C * dV/dt (looks kind of like ICE doesn't it?), so if blue is voltage, we can pick points were dV/dt = 0, which are the peaks and valleys, and see that the red current is zero, and as the voltage increases from the valley, we see the current increasing from zero, and as the voltage crosses zero, which we know is where dV/dt is maximum for a sinusoid, we see that the current reaches its peak, and as the slope of the voltage decreases on its way to the peak, we can see the current falling.

Obviously, one can write the model as V = 1/C * integral(i, dt) and run the obverse argument.

I'm not going to allow myself to get trapped into the chicken-egg argument beyond this.

TTFN (ta ta for now)
I can do absolutely anything. I'm an expert!

https://www.youtube.com/watch?v=BKorP55Aqvg

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[Skogsgurra]

Sorry to make that impression. Not my intention either.

I hope that you get my point. If not, what about the Maxwell Equations and one of the simplified forms i = C*du/dt?

If u = sine(wt) then du/dt is w*cosine(wt). Hence i = w*cosine(wt) from which follows that i leads with 90 degrees, because cosine leads sine with 90 degrees in a system with positive rotation. Which is always assumed.

Gunnar Englund

http://www.gke.org

--------------------------------------
Half full - Half empty? I don't mind. It's what in it that counts.

 

[Skogsgurra]

IR said it well. But it is not a chicken/hen situation. Not at all.

Gunnar Englund

http://www.gke.org

--------------------------------------
Half full - Half empty? I don't mind. It's what in it that counts.

 

[Skogsgurra]

Sorry, hen/egg. That chicken comes before hen is certain.

Gunnar Englund

http://www.gke.org

--------------------------------------
Half full - Half empty? I don't mind. It's what in it that counts.

 

[IRstuff]

There's an ET-er, who shall remain nameless, that will argue the opposite, ad nauseum.

TTFN (ta ta for now)
I can do absolutely anything. I'm an expert!

https://www.youtube.com/watch?v=BKorP55Aqvg

faq731-376 forum1529 Entire Forum list

http://www.eng-tips.com/forumlist.cfm