Externally summed CTs for bus protection 3

[Mbrooke]

Starting this not to steer off another thread, but I inquire 2 questions:

1. At what point or fault levels do engineers typically move away from externally summed CTs for (over-current) bus differential protection? C800 class CTs of concern here FWIW.

2. Can externally summed bus protection CTs be used in networked circuits?

 

[jghrist]

I have the transformer R and X for each unit, plus the source 115kv impedance. Will this be enough?

Yes, if you have the complex 115 kV impedance. Combine the 3 parallel transformer impedances, add to the 115 kV impedance to get the total impedance. Ztotal = Z115 + 1/(1/Zt1 + 1/Zt2 + 1/Zt3) All Zs are complex (R + jX).

 

[Mbrooke]

Thanks. But I will be frank, it seems CTs saturate a lot more than I expected at distribution busses- perhaps more so than transmission.

 

[Mbrooke]

One last question. Why is it that a higher CT circuit resistance increases saturation? My understanding has been that a higher resistance impedes current, and less secondary current means less flux in the core needing to offset that being taken out... similar to overloading a transformer... Or am I off? In short I have always assumed higher resistance means less saturation.

 

[cranky108]

The more the impedance on the CT circuit, the higher the voltage the CT must generate to push the same current through the circuit.

You should keep the impedance low to prevent saturation of the CT.

Except in the high impedance differential.

 

[Mbrooke]

Thank you and I will do that.


Once I have CT saturation values and other parameters, should I let them extensively dictate my 487B settings or be more casual? I heard a member mention on here that the 487B makes a trip decision before saturation can take place?

 

[stevenal]

I just try to keep the voltage below 50% of the effective C rating. Effective means it has been adjusted for the tap used.

The problem with saturation is not failure to trip, it is the possibility of tripping for out of zone faults. Tripping decision speed doesn't come into play, since it can still make the wrong decision on the very next processing interval, or the next.

 

[Mbrooke]

But not if the 487B makes the decision to trip without any intentional delay? I guess I am intrigued by the second post in this thread:

http://www.eng-tips.com/viewthread.cfm?qid=424564