How to Determine Capacitor Value 1

[veryuniqueid]

I am trying to determine the capacitor value needed to suppress a voltage spike that occurs when a MOSFET turns on.

I have a pair of MOSFETs (QA and QB) in an H-Bridge configuration which are used to switch a 12V battery across a load. I also power the logic to control the H-Bridge from this battery. Power to this logic is switched on and off with a bipolar transistor (Q1) driven remotely through an opto-coupler. I have uploaded a circuit diagram.

When QA turns on and QB turns off, there is a voltage spike that destroys Q1. If I place a big enough capacitor (C) across the battery it works fine. I am trying to determine how big I need to make C in order to make this work. It seems to be dependent on factors in the implementation of the circuit. I have built several copies of this circuit and the value of C that allows it to work is different for each. As expected, the largest value works for all three, but how do I know this will work for the next one? It also seems to be dependent on the battery as well. I assume this is because the voltage of the battery is different depending on its state of charge and the internal impedance of the battery probably has something to do with it as well.

 

[itsmoked]

What is the point of QB?

Is this load regenerative?

What IS the load?

Keith Cress
kcress -

http://www.flaminsystems.com

 

[OperaHouse]

The value of the capacitor can only be determined by experimentation since information on the battery is unknown. That part failing indicates quite a spike. I suspect having a C large enough to protect the transistor may cause the FET to fail over time. Some voltage suppression at the load is suggested.

 

[MacGyverS2000]

Plenty of battery-backup ICs with a soft-start feature out there for <$1... seems to me they would be a worthwhile investment here.

Dan - Owner

http://www.Hi-TecDesigns.com

 

[veryuniqueid]

Thanks for the quick responses. Yes, trial and error is what worked for me. I was hoping there might be some rules of thumb people use based on things like the voltage of the battery at maximum and charge and its internal impedance, and other things. That way I could tell if how I was going to hook it up was going to work in advance rather than experiment each time I tried to change something.

So far I haven't hooked up a load. I figured I would make sure all the logic work first, then address the issues associated with the actual load.

Thanks again.
Ed

 

[GonzaloEE]

Keep in mind that spikes may damage your circuit either by the actual voltage level and/or the voltage slope.
Most big caps are electrolythic, good for sinking high amounts of charge, though rather slow for too fast spikes.

Try adding some ceramic/tantalum cap in parallel, whose shorter response time will sink some of the rising edge of spikes, leaving the slower big cap to absorb the rest of the spike energy.

Good Luck!

 

[OperaHouse]

So far I haven't hooked up a load.

That is an interesting comment. Makes me think both fets are on at the same time for a short period greatly lowering battery voltage. The cap on the input of the three terminal regulator then supplies a REVERSE voltage on the transistor destroying it. An isolating diode between the battery and the transistor switch circuit would solve that. Of course, tis also means you have a design error in the logic circuit that allows both fets to be on at the same time. Adding the diode will allow you to diagnose this problem with a scope without destroying additional components.

 

[veryuniqueid]

OperaHouse, you hit the nail right on the head. I was setting both gate signals in the same state. This meant that while QB was taking 200ns to turn off, QA was taking 100ns to turn on. Based on the pulsed current specs I didn't think this would be a problem for the FETs, but I never considered the other effects. I added another state adding a delay between QB going off and QA coming on. Presto, fixed.

Thanks.
Ed

 

[Marke]

An interesting point to also consider, is the inductance of the physical loop from the battery round through the two FETs and back to the battery. The greater the inductance of this loop, the higher the voltage that will be generated when the overload current stops, and hence the larger the value of the capacitor required to decouple the circuit.

You need to minimise the loop area if possible to give the best results.

Best regards,

Mark Empson
L M Photonics Ltd

 

[OperaHouse]

This reminds me of the early S-100 where people used gate delays to create timing. As the manufacturing improved, the chips got faster and things that used to work didn't anymore. You can never depend on published specs for how fast something turns on or off. Valves overlap in engines and there can be some good reasons to do that in fets, but it can get a little dicey.