loicalset
Electrical
- May 1, 2007
- 25
A quick sanity check, because my brain is turning to mush:
Is there any problem with using two cascaded N-MOSFETs as a sort of "AND" logic, low-side cutoff for an LDO regulator? I am planning to cascade them in the ground path of the LDO. There are two conditions (batt voltage good, mode selected) that I want to act as gates for powering on a device via the LDO. If one or both gate inputs are not high, then there is no ground path for the LDO. Something tells me I am missing something big, but I can't put my finger on it at the moment. Thanks for the help!
Is there any problem with using two cascaded N-MOSFETs as a sort of "AND" logic, low-side cutoff for an LDO regulator? I am planning to cascade them in the ground path of the LDO. There are two conditions (batt voltage good, mode selected) that I want to act as gates for powering on a device via the LDO. If one or both gate inputs are not high, then there is no ground path for the LDO. Something tells me I am missing something big, but I can't put my finger on it at the moment. Thanks for the help!