Sorry for the poor information. I was still trying to figure out specifics regarding how the circuit would work when I started the thread.
The inputs are all active, and the signal that I want converted would be a half-second period of inactivity, from some percentage of the inputs. The percentage would change with every signal, though if the inputs are ordered sequentially, the system could work by identifying the highest deactivated input, and then outputting the binary number assigned to that input. The circuit isn't finalized yet, so the signal could be a voltage or current, though I'm currently leaning towards current.
After speaking to a friend, I think that 64 NAND gates and 2 8-to-3 digital encoders might work. Once I study the data sheets I should be able to hammer out a few more specifics.
Sorry again for the poorly presented problem. My experience with circuit analysis is limited to a year of university classes analyzing existing circuits, not designing them. If anyone has better ideas, or even criticisms of the current plan, I'd love to hear them. And if anyone is curious about any other specifics regarding the circuit I'll try my best to answer them.
Thanks!