Old Xilinx fault code

[JeffJackson]

Hi all,
Just wondered if anyone can recall the old fault code generated by Xilinx when mapping and fpga.
Using a XC4020HQ208, design simulates and compiles with no errors. When building I get NGDBUILD done then when mapping the following:
ERROR:OldMap:928 - There is no signal on pin A0 of CY4 symbol
This design ( as a previuos version) has built before OK.
I just needed to add a small change to a count, and now I can't build at all. Even using the previous version of my VHDL code I get the same error, I seem to have got a bug, that I can't kill. Any tips greatfully received.
Jeff

 

[Noway2]

It has been quite a few years since I used the old Xilinx tool, which was Foundation 3.1. When I first started using it, however, I did have some issues with NGDBUILD. If I recall it was a compatibility issue with the the version of Windows I was using, which I think was 98 and I ended up working with NT4.

My suggestion, for what limited value it has, is to try to make the build environment, including the OS version as close to what it was originally as possible. Another suggestion would possibly be to re-install the compiler.